Message ID | 20180926184238.2931-1-jimw@sifive.com |
---|---|
State | New |
Headers | show |
Series | RISC-V: Delete obsolete MIPS comment. | expand |
diff --git a/gcc/config/riscv/riscv.h b/gcc/config/riscv/riscv.h index 4bbb491ac87..3c9f96d6b4d 100644 --- a/gcc/config/riscv/riscv.h +++ b/gcc/config/riscv/riscv.h @@ -516,8 +516,7 @@ enum reg_class #define FUNCTION_VALUE_REGNO_P(N) ((N) == GP_RETURN || (N) == FP_RETURN) /* 1 if N is a possible register number for function argument passing. - We have no FP argument registers when soft-float. When FP registers - are 32 bits, we can't directly reference the odd numbered ones. */ + We have no FP argument registers when soft-float. */ /* Accept arguments in a0-a7, and in fa0-fa7 if permitted by the ABI. */ #define FUNCTION_ARG_REGNO_P(N) \