diff mbox series

RISC-V: Minor pattern name cleanup.

Message ID 20180516183941.31570-1-jimw@sifive.com
State New
Headers show
Series RISC-V: Minor pattern name cleanup. | expand

Commit Message

Jim Wilson May 16, 2018, 6:39 p.m. UTC 
This just fixes a minor nit with an earlier patch.  I added some new patterns
that are never directly called, and forgot to put the asterisk in the name.

Tested with riscv{32,64}-{elf,linux} builds to verify that the compiler still
builds OK.

Committed.

Jim

	gcc/
	* config/riscv/riscv.md (<optab>si3_mask, <optab>si3_mask_1): Prepend
	asterisk to name.
	(<optab>di3_mask, <optab>di3_mask_1): Likewise.
---
 gcc/config/riscv/riscv.md | 8 ++++----
 1 file changed, 4 insertions(+), 4 deletions(-)
diff mbox series

Patch

diff --git a/gcc/config/riscv/riscv.md b/gcc/config/riscv/riscv.md
index 9d222731a06..56fe516dbcf 100644
--- a/gcc/config/riscv/riscv.md
+++ b/gcc/config/riscv/riscv.md
@@ -1504,7 +1504,7 @@ 
   [(set_attr "type" "shift")
    (set_attr "mode" "SI")])
 
-(define_insn_and_split "<optab>si3_mask"
+(define_insn_and_split "*<optab>si3_mask"
   [(set (match_operand:SI     0 "register_operand" "= r")
 	(any_shift:SI
 	    (match_operand:SI 1 "register_operand" "  r")
@@ -1523,7 +1523,7 @@ 
   [(set_attr "type" "shift")
    (set_attr "mode" "SI")])
 
-(define_insn_and_split "<optab>si3_mask_1"
+(define_insn_and_split "*<optab>si3_mask_1"
   [(set (match_operand:SI     0 "register_operand" "= r")
 	(any_shift:SI
 	    (match_operand:SI 1 "register_operand" "  r")
@@ -1559,7 +1559,7 @@ 
   [(set_attr "type" "shift")
    (set_attr "mode" "DI")])
 
-(define_insn_and_split "<optab>di3_mask"
+(define_insn_and_split "*<optab>di3_mask"
   [(set (match_operand:DI     0 "register_operand" "= r")
 	(any_shift:DI
 	    (match_operand:DI 1 "register_operand" "  r")
@@ -1579,7 +1579,7 @@ 
   [(set_attr "type" "shift")
    (set_attr "mode" "DI")])
 
-(define_insn_and_split "<optab>di3_mask_1"
+(define_insn_and_split "*<optab>di3_mask_1"
   [(set (match_operand:DI     0 "register_operand" "= r")
 	(any_shift:DI
 	    (match_operand:DI 1 "register_operand" "  r")