From patchwork Thu Apr 27 08:09:27 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Daniel Santos X-Patchwork-Id: 755852 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from sourceware.org (server1.sourceware.org [209.132.180.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 3wD8f96w0Xz9s75 for ; Thu, 27 Apr 2017 18:06:09 +1000 (AEST) Authentication-Results: ozlabs.org; dkim=pass (1024-bit key; unprotected) header.d=gcc.gnu.org header.i=@gcc.gnu.org header.b="cCuUYa73"; dkim-atps=neutral DomainKey-Signature: a=rsa-sha1; c=nofws; d=gcc.gnu.org; h=list-id :list-unsubscribe:list-archive:list-post:list-help:sender:from :to:subject:date:message-id:in-reply-to:references; q=dns; s= default; b=CAQC03UjYKqeRyIyD3WeVI5iRDMhjktkJ/NrJ04vcOZaCBXkeAyqV EwJaeJYAY4OJvB9DHNgiO1DwNorEy2IEDx50wRK1Aul0Jq+cB/fUaPzKDkrpxwtU OSFT7Fc/jbqrHpya2TmWv4ED+rF6qZ0uE7OaGe471MOf4yYlOrlt3I= DKIM-Signature: v=1; a=rsa-sha1; c=relaxed; d=gcc.gnu.org; h=list-id :list-unsubscribe:list-archive:list-post:list-help:sender:from :to:subject:date:message-id:in-reply-to:references; s=default; bh=fO09PR/piOspbEr2QtUqhHRhMnE=; b=cCuUYa73iMIffbFyi+vEPE1aSo5/ vZBJRgMbpCfje23gxNs5bSfHr9pNa9J2zGWMCNf6yiOEfczK1pjW4utXfmKwsrx1 GchgkqatOAj+ouFXuMktup1iZ5q3f4KnRLH/gGkRXxMSxIOvQAoz5hGN90Js6Ei0 SKL9nM749KLds4A= Received: (qmail 58229 invoked by alias); 27 Apr 2017 08:05:06 -0000 Mailing-List: contact gcc-patches-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: List-Unsubscribe: List-Archive: List-Post: List-Help: Sender: gcc-patches-owner@gcc.gnu.org Delivered-To: mailing list gcc-patches@gcc.gnu.org Received: (qmail 57846 invoked by uid 89); 27 Apr 2017 08:05:03 -0000 Authentication-Results: sourceware.org; auth=none X-Virus-Found: No X-Spam-SWARE-Status: No, score=-25.3 required=5.0 tests=AWL, BAYES_00, GIT_PATCH_0, GIT_PATCH_1, GIT_PATCH_2, GIT_PATCH_3, RCVD_IN_DNSWL_LOW, RP_MATCHES_RCVD, SPF_PASS autolearn=ham version=3.3.2 spammy=who's, whos X-HELO: sasl.smtp.pobox.com Received: from pb-smtp2.pobox.com (HELO sasl.smtp.pobox.com) (64.147.108.71) by sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with ESMTP; Thu, 27 Apr 2017 08:05:01 +0000 Received: from sasl.smtp.pobox.com (unknown [127.0.0.1]) by pb-smtp2.pobox.com (Postfix) with ESMTP id 3A230883AC; Thu, 27 Apr 2017 04:05:03 -0400 (EDT) Received: from pb-smtp2.nyi.icgroup.com (unknown [127.0.0.1]) by pb-smtp2.pobox.com (Postfix) with ESMTP id 32694883AB; Thu, 27 Apr 2017 04:05:03 -0400 (EDT) Received: from localhost.localdomain (unknown [76.215.41.237]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by pb-smtp2.pobox.com (Postfix) with ESMTPSA id 29861883A2; Thu, 27 Apr 2017 04:05:01 -0400 (EDT) From: Daniel Santos To: gcc-patches , Uros Bizjak , Jan Hubicka Subject: [PATCH 07/12] [i386] Modify ix86_save_reg to optionally omit stub-managed registers Date: Thu, 27 Apr 2017 03:09:27 -0500 Message-Id: <20170427080932.11703-7-daniel.santos@pobox.com> In-Reply-To: <49e81c0b-07a4-22df-d7c3-2439177ac7cf@pobox.com> References: <49e81c0b-07a4-22df-d7c3-2439177ac7cf@pobox.com> X-Pobox-Relay-ID: 373CFD46-2B20-11E7-9213-C260AE2156B6-06139138!pb-smtp2.pobox.com X-IsSubscribed: yes Add HARD_REG_SET stub_managed_regs to track which registers will be managed by the pro/epilogue stubs for the function. Add a third parameter bool ignore_outlined to ix86_save_reg to specify rather or not the count should include registers marked in stub_managed_regs. All call sites are modified. Signed-off-by: Daniel Santos --- gcc/config/i386/i386.c | 31 ++++++++++++++++++++----------- 1 file changed, 20 insertions(+), 11 deletions(-) diff --git a/gcc/config/i386/i386.c b/gcc/config/i386/i386.c index 2da3da1f97a..4f0cb7dd6cc 100644 --- a/gcc/config/i386/i386.c +++ b/gcc/config/i386/i386.c @@ -12618,6 +12618,10 @@ ix86_hard_regno_scratch_ok (unsigned int regno) && df_regs_ever_live_p (regno))); } +/* Registers who's save & restore will be managed by stubs called from + pro/epilogue. */ +static HARD_REG_SET GTY(()) stub_managed_regs; + /* Return true if register class CL should be an additional allocno class. */ @@ -12630,7 +12634,7 @@ ix86_additional_allocno_class_p (reg_class_t cl) /* Return TRUE if we need to save REGNO. */ static bool -ix86_save_reg (unsigned int regno, bool maybe_eh_return) +ix86_save_reg (unsigned int regno, bool maybe_eh_return, bool ignore_outlined) { /* If there are no caller-saved registers, we preserve all registers, except for MMX and x87 registers which aren't supported when saving @@ -12698,6 +12702,10 @@ ix86_save_reg (unsigned int regno, bool maybe_eh_return) } } + if (ignore_outlined && cfun->machine->call_ms2sysv + && in_hard_reg_set_p (stub_managed_regs, DImode, regno)) + return false; + if (crtl->drap_reg && regno == REGNO (crtl->drap_reg) && !cfun->machine->no_drap_save_restore) @@ -12718,7 +12726,7 @@ ix86_nsaved_regs (void) int regno; for (regno = 0; regno < FIRST_PSEUDO_REGISTER; regno++) - if (GENERAL_REGNO_P (regno) && ix86_save_reg (regno, true)) + if (GENERAL_REGNO_P (regno) && ix86_save_reg (regno, true, true)) nregs ++; return nregs; } @@ -12734,7 +12742,7 @@ ix86_nsaved_sseregs (void) if (!TARGET_64BIT_MS_ABI) return 0; for (regno = 0; regno < FIRST_PSEUDO_REGISTER; regno++) - if (SSE_REGNO_P (regno) && ix86_save_reg (regno, true)) + if (SSE_REGNO_P (regno) && ix86_save_reg (regno, true, true)) nregs ++; return nregs; } @@ -12814,6 +12822,7 @@ ix86_compute_frame_layout (struct ix86_frame *frame) frame->nregs = ix86_nsaved_regs (); frame->nsseregs = ix86_nsaved_sseregs (); + CLEAR_HARD_REG_SET (stub_managed_regs); /* 64-bit MS ABI seem to require stack alignment to be always 16, except for function prologues, leaf functions and when the defult @@ -13207,7 +13216,7 @@ ix86_emit_save_regs (void) rtx_insn *insn; for (regno = FIRST_PSEUDO_REGISTER - 1; regno-- > 0; ) - if (GENERAL_REGNO_P (regno) && ix86_save_reg (regno, true)) + if (GENERAL_REGNO_P (regno) && ix86_save_reg (regno, true, true)) { insn = emit_insn (gen_push (gen_rtx_REG (word_mode, regno))); RTX_FRAME_RELATED_P (insn) = 1; @@ -13297,7 +13306,7 @@ ix86_emit_save_regs_using_mov (HOST_WIDE_INT cfa_offset) unsigned int regno; for (regno = 0; regno < FIRST_PSEUDO_REGISTER; regno++) - if (GENERAL_REGNO_P (regno) && ix86_save_reg (regno, true)) + if (GENERAL_REGNO_P (regno) && ix86_save_reg (regno, true, true)) { ix86_emit_save_reg_using_mov (word_mode, regno, cfa_offset); cfa_offset -= UNITS_PER_WORD; @@ -13312,7 +13321,7 @@ ix86_emit_save_sse_regs_using_mov (HOST_WIDE_INT cfa_offset) unsigned int regno; for (regno = 0; regno < FIRST_PSEUDO_REGISTER; regno++) - if (SSE_REGNO_P (regno) && ix86_save_reg (regno, true)) + if (SSE_REGNO_P (regno) && ix86_save_reg (regno, true, true)) { ix86_emit_save_reg_using_mov (V4SFmode, regno, cfa_offset); cfa_offset -= GET_MODE_SIZE (V4SFmode); @@ -13696,13 +13705,13 @@ get_scratch_register_on_entry (struct scratch_reg *sr) && !static_chain_p && drap_regno != CX_REG) regno = CX_REG; - else if (ix86_save_reg (BX_REG, true)) + else if (ix86_save_reg (BX_REG, true, false)) regno = BX_REG; /* esi is the static chain register. */ else if (!(regparm == 3 && static_chain_p) - && ix86_save_reg (SI_REG, true)) + && ix86_save_reg (SI_REG, true, false)) regno = SI_REG; - else if (ix86_save_reg (DI_REG, true)) + else if (ix86_save_reg (DI_REG, true, false)) regno = DI_REG; else { @@ -14812,7 +14821,7 @@ ix86_emit_restore_regs_using_mov (HOST_WIDE_INT cfa_offset, unsigned int regno; for (regno = 0; regno < FIRST_PSEUDO_REGISTER; regno++) - if (GENERAL_REGNO_P (regno) && ix86_save_reg (regno, maybe_eh_return)) + if (GENERAL_REGNO_P (regno) && ix86_save_reg (regno, maybe_eh_return, true)) { rtx reg = gen_rtx_REG (word_mode, regno); rtx mem; @@ -14851,7 +14860,7 @@ ix86_emit_restore_sse_regs_using_mov (HOST_WIDE_INT cfa_offset, unsigned int regno; for (regno = 0; regno < FIRST_PSEUDO_REGISTER; regno++) - if (SSE_REGNO_P (regno) && ix86_save_reg (regno, maybe_eh_return)) + if (SSE_REGNO_P (regno) && ix86_save_reg (regno, maybe_eh_return, true)) { rtx reg = gen_rtx_REG (V4SFmode, regno); rtx mem;