| Message ID | 20160311120022.GE3017@tucnak.redhat.com |
|---|---|
| State | New |
| Headers | show |
On Fri, 11 Mar 2016, Jakub Jelinek wrote: > Hi! > > The following testcase ICEs on i?86/x86_64 and aarch64, because gen_lowpart > (pointer to gen_lowpart_general at that spot) doesn't want to handle > SUBREG of SYMBOL_REF. Fixed by using a variant that doesn't ICE and forcing > the operand into a register if it can't be optimized without generating > instructions. This is similar to the case a few lines above, where we also > force_reg if simplify_subreg failed. > > Bootstrapped/regtested on x86_64-linux and i686-linux, ok for trunk? Ok. Thanks, Richard. > 2016-03-11 Jakub Jelinek <jakub@redhat.com> > > PR rtl-optimization/70174 > * expmed.c (store_bit_field_using_insv): Use gen_lowpart_if_possible > followed by gen_lowpart on force_reg instead of just gen_lowpart. > > * gcc.dg/pr70174.c: New test. > > --- gcc/expmed.c.jj 2016-02-11 20:28:51.000000000 +0100 > +++ gcc/expmed.c 2016-03-11 10:40:27.258719168 +0100 > @@ -658,24 +658,28 @@ store_bit_field_using_insv (const extrac > { > if (GET_MODE_BITSIZE (GET_MODE (value)) >= bitsize) > { > + rtx tmp; > /* Optimization: Don't bother really extending VALUE > if it has all the bits we will actually use. However, > if we must narrow it, be sure we do it correctly. */ > > if (GET_MODE_SIZE (GET_MODE (value)) < GET_MODE_SIZE (op_mode)) > { > - rtx tmp; > - > tmp = simplify_subreg (op_mode, value1, GET_MODE (value), 0); > if (! tmp) > tmp = simplify_gen_subreg (op_mode, > force_reg (GET_MODE (value), > value1), > GET_MODE (value), 0); > - value1 = tmp; > } > else > - value1 = gen_lowpart (op_mode, value1); > + { > + tmp = gen_lowpart_if_possible (op_mode, value1); > + if (! tmp) > + tmp = gen_lowpart (op_mode, force_reg (GET_MODE (value), > + value1)); > + } > + value1 = tmp; > } > else if (CONST_INT_P (value)) > value1 = gen_int_mode (INTVAL (value), op_mode); > --- gcc/testsuite/gcc.dg/pr70174.c.jj 2016-03-11 10:42:45.914894656 +0100 > +++ gcc/testsuite/gcc.dg/pr70174.c 2016-03-11 10:42:31.000000000 +0100 > @@ -0,0 +1,11 @@ > +/* PR rtl-optimization/70174 */ > +/* { dg-do compile } */ > +/* { dg-options "-O2" } */ > + > +struct S { int f : 4; } a; > + > +void > +foo (void) > +{ > + a.f = foo; /* { dg-warning "assignment makes integer from pointer without a cast" } */ > +} > > Jakub > >
--- gcc/expmed.c.jj 2016-02-11 20:28:51.000000000 +0100 +++ gcc/expmed.c 2016-03-11 10:40:27.258719168 +0100 @@ -658,24 +658,28 @@ store_bit_field_using_insv (const extrac { if (GET_MODE_BITSIZE (GET_MODE (value)) >= bitsize) { + rtx tmp; /* Optimization: Don't bother really extending VALUE if it has all the bits we will actually use. However, if we must narrow it, be sure we do it correctly. */ if (GET_MODE_SIZE (GET_MODE (value)) < GET_MODE_SIZE (op_mode)) { - rtx tmp; - tmp = simplify_subreg (op_mode, value1, GET_MODE (value), 0); if (! tmp) tmp = simplify_gen_subreg (op_mode, force_reg (GET_MODE (value), value1), GET_MODE (value), 0); - value1 = tmp; } else - value1 = gen_lowpart (op_mode, value1); + { + tmp = gen_lowpart_if_possible (op_mode, value1); + if (! tmp) + tmp = gen_lowpart (op_mode, force_reg (GET_MODE (value), + value1)); + } + value1 = tmp; } else if (CONST_INT_P (value)) value1 = gen_int_mode (INTVAL (value), op_mode); --- gcc/testsuite/gcc.dg/pr70174.c.jj 2016-03-11 10:42:45.914894656 +0100 +++ gcc/testsuite/gcc.dg/pr70174.c 2016-03-11 10:42:31.000000000 +0100 @@ -0,0 +1,11 @@ +/* PR rtl-optimization/70174 */ +/* { dg-do compile } */ +/* { dg-options "-O2" } */ + +struct S { int f : 4; } a; + +void +foo (void) +{ + a.f = foo; /* { dg-warning "assignment makes integer from pointer without a cast" } */ +}