From patchwork Thu Apr 17 00:20:18 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Segher Boessenkool X-Patchwork-Id: 339757 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from sourceware.org (server1.sourceware.org [209.132.180.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 75CD414007B for ; Thu, 17 Apr 2014 10:20:38 +1000 (EST) DomainKey-Signature: a=rsa-sha1; c=nofws; d=gcc.gnu.org; h=list-id :list-unsubscribe:list-archive:list-post:list-help:sender:date :from:to:cc:subject:message-id:references:mime-version :content-type:in-reply-to; q=dns; s=default; b=OkejdSLSlZKKYX21W VsN3nggg95PDlcAV+0HkcMD4zpgcVi0gE+JccedAD9wSwVAaEdCDjKazgZUREg9l xqKCgo57BFg35Tynog8MaR9GAGpJurGZ8PJo2DKFHrUiPTo1T2eotk4raiwESdkS 0DW74m0MWufCLEP/lYITvQF9QA= DKIM-Signature: v=1; a=rsa-sha1; c=relaxed; d=gcc.gnu.org; h=list-id :list-unsubscribe:list-archive:list-post:list-help:sender:date :from:to:cc:subject:message-id:references:mime-version :content-type:in-reply-to; s=default; bh=jYtRDTA2L/L4Xbg1THSS2j6 vE5Q=; b=hWIXGQK6UVTPA9VuYl3oVGGv3WJ1sjAOtDcAreEejtsDRCHJ18V1cgj rdn1ZpkRsbflanA2Nj5R4t/GuZ+W5uk65yHbC7Jv30EYM+xdRF0qU3DIRtULL2JJ nQ8w25Bd0EYtZF8DOy/tV5to7qSjJy+qz+JpnedRrIQv/stk5qG8= Received: (qmail 22431 invoked by alias); 17 Apr 2014 00:20:30 -0000 Mailing-List: contact gcc-patches-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: List-Unsubscribe: List-Archive: List-Post: List-Help: Sender: gcc-patches-owner@gcc.gnu.org Delivered-To: mailing list gcc-patches@gcc.gnu.org Received: (qmail 22422 invoked by uid 89); 17 Apr 2014 00:20:29 -0000 Authentication-Results: sourceware.org; auth=none X-Virus-Found: No X-Spam-SWARE-Status: No, score=-2.6 required=5.0 tests=AWL, BAYES_00, RP_MATCHES_RCVD autolearn=ham version=3.3.2 X-HELO: gate.crashing.org Received: from gate.crashing.org (HELO gate.crashing.org) (63.228.1.57) by sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with (AES256-SHA encrypted) ESMTPS; Thu, 17 Apr 2014 00:20:26 +0000 Received: from gate.crashing.org (localhost.localdomain [127.0.0.1]) by gate.crashing.org (8.14.1/8.13.8) with ESMTP id s3H0KMxk025423; Wed, 16 Apr 2014 19:20:22 -0500 Received: (from segher@localhost) by gate.crashing.org (8.14.1/8.14.1/Submit) id s3H0KLAN025422; Wed, 16 Apr 2014 19:20:21 -0500 Date: Wed, 16 Apr 2014 19:20:18 -0500 From: segher@kernel.crashing.org To: Jeff Law Cc: gcc-patches@gcc.gnu.org Subject: Re: [PATCH] PR60822 (m68k, missing earlyclobber in extendplussidi) Message-ID: <20140417002018.GA25172@gate.crashing.org> References: <50f4b5de5e870723c49d1bca41bffadc77eb849d.1397668443.git.segher@kernel.crashing.org> <534EEBE8.4010809@redhat.com> Mime-Version: 1.0 Content-Disposition: inline In-Reply-To: <534EEBE8.4010809@redhat.com> User-Agent: Mutt/1.4.2.3i X-IsSubscribed: yes On Wed, Apr 16, 2014 at 02:45:28PM -0600, Jeff Law wrote: > Isn't the problem that operands 1 is a MEM which use the same register > as operands 3 in the memory address? Yes, exactly. > ISTM either removing the memory constraint entirely, or splitting it off > into a separate alternative and only earlyclobbering that alternative > would be better. > > Or am I missing something? No, that does seem better :-) I tried both your suggestions; the first results in better code. Here's a new patch. As before, it builds and fixes the testcase, but I didn't run the testsuite (I have no emulator set up). Thanks, Segher gcc/ PR target/60822 2014-04-16 Segher Boessenkool * config/m68k/m68k.md (extendplussidi): Don't allow memory for operand 1. --- gcc/config/m68k/m68k.md | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-) diff --git a/gcc/config/m68k/m68k.md b/gcc/config/m68k/m68k.md index e61048b..57ba1a1 100644 --- a/gcc/config/m68k/m68k.md +++ b/gcc/config/m68k/m68k.md @@ -1868,9 +1868,12 @@ (define_insn "extendsidi2" ;; Maybe there is a way to make that the general case, by forcing the ;; result of the SI tree to be in the lower register of the DI target +;; Don't allow two memory operands: it needs an earlyclobber and will +;; result in worse code. + (define_insn "extendplussidi" [(set (match_operand:DI 0 "register_operand" "=d") - (sign_extend:DI (plus:SI (match_operand:SI 1 "general_operand" "%rmn") + (sign_extend:DI (plus:SI (match_operand:SI 1 "nonmemory_operand" "%rn") (match_operand:SI 2 "general_operand" "rmn"))))] "" {