From patchwork Tue Mar 26 06:58:03 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Walter Lee X-Patchwork-Id: 231104 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from sourceware.org (server1.sourceware.org [209.132.180.131]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (Client CN "localhost", Issuer "www.qmailtoaster.com" (not verified)) by ozlabs.org (Postfix) with ESMTPS id 11DF32C00C6 for ; Tue, 26 Mar 2013 17:58:22 +1100 (EST) DomainKey-Signature: a=rsa-sha1; c=nofws; d=gcc.gnu.org; h=list-id :list-unsubscribe:list-archive:list-post:list-help:sender:date :message-id:from:to:subject:reply-to:mime-version:content-type; q=dns; s=default; b=LL4NdrcsEItzho8Uv1WkzDpFQW7LE/FcqwmeRJc5A8Z NndxZIvNHU95wO/aMO5AAjv3QiCZ+TlZfLWacWzvu4cs/qJIDXCVJWj1pDVtCcZ8 kmyy2PTjBZf/oqjOOpl/YEWvzPtQ1V7mq6zLwS9eNZY5o/4bQVlI4DCgB6oCFojE = DKIM-Signature: v=1; a=rsa-sha1; c=relaxed; d=gcc.gnu.org; h=list-id :list-unsubscribe:list-archive:list-post:list-help:sender:date :message-id:from:to:subject:reply-to:mime-version:content-type; s=default; bh=cgBEPn+7KaI4SmGEaHH2KInY+ew=; b=rnw84+Sgh/DnepP1G Yu1+j1vtcoiYeQXomm7Hiv3qMBMbKOA/Vc/wH5SI/itHVac6CeCDT9CzXw4fVsWW gNDBJryMK3JKPQM1lwcq62t/HAOJrnW1cJ/nANeUTEYthUt5PyLWOWFktHQhh0kZ WKgTNaM0+Vh2BVe5+lKAqr8qcw= Received: (qmail 846 invoked by alias); 26 Mar 2013 06:58:14 -0000 Mailing-List: contact gcc-patches-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: List-Unsubscribe: List-Archive: List-Post: List-Help: Sender: gcc-patches-owner@gcc.gnu.org Delivered-To: mailing list gcc-patches@gcc.gnu.org Received: (qmail 808 invoked by uid 89); 26 Mar 2013 06:58:08 -0000 X-Spam-SWARE-Status: No, score=-2.6 required=5.0 tests=AWL, BAYES_00, RP_MATCHES_RCVD, TW_EG autolearn=ham version=3.3.1 Received: from usmamail.tilera.com (HELO USMAMAIL.TILERA.COM) (12.216.194.151) by sourceware.org (qpsmtpd/0.84/v0.84-167-ge50287c) with ESMTP; Tue, 26 Mar 2013 06:58:05 +0000 Received: from farm-0001.internal.tilera.com (10.2.0.31) by USMAEXCH2.tad.internal.tilera.com (10.3.0.33) with Microsoft SMTP Server (TLS) id 14.0.722.0; Tue, 26 Mar 2013 02:58:03 -0400 Received: (from walt@localhost) by farm-0001.internal.tilera.com (8.14.4/8.12.11/Submit) id r2Q6w38c017420; Tue, 26 Mar 2013 02:58:03 -0400 Date: Tue, 26 Mar 2013 02:58:03 -0400 Message-ID: <201303260658.r2Q6w38c017420@farm-0001.internal.tilera.com> From: Walter Lee To: Subject: [committed] TILE-Gx: add __insn_shufflebytes1 intrinsic Reply-To: Walter Lee MIME-Version: 1.0 This patch adds the __insn_shufflebytes1, which takes only one argument. result = __insn_shufflebytes1(input, select); is equivalent to: result = __insn_shufflebytes(result, input, select); It has the advantage that the compiler will not waste a cycle initializing result unnecessarily. It is the user's responsibility to ensure that the select value is only selecting bytes from the second operand. This has been backported to 4.7 and 4.8. * config/tilegx/tilegx-builtins.h (enum tilegx_builtin): Add TILEGX_INSN_SHUFFLEBYTES1. * config/tilegx/tilegx.c (tilegx_builtin_info): Add entry for shufflebytes1. (tilegx_builtins): Ditto. * config/tilegx/tilegx.md (insn_shufflebytes1): New pattern. Index: gcc/config/tilegx/tilegx.md =================================================================== --- gcc/config/tilegx/tilegx.md (revision 197079) +++ gcc/config/tilegx/tilegx.md (working copy) @@ -3959,6 +3959,15 @@ "shufflebytes\t%0, %r2, %r3" [(set_attr "type" "X0")]) +(define_insn "insn_shufflebytes1" + [(set (match_operand:DI 0 "register_operand" "=r") + (unspec:DI [(match_operand:DI 1 "reg_or_0_operand" "rO") + (match_operand:DI 2 "reg_or_0_operand" "rO")] + UNSPEC_INSN_SHUFFLEBYTES))] + "" + "shufflebytes\t%0, %r1, %r2" + [(set_attr "type" "X0")]) + ;; stores (define_expand "insn_st" Index: gcc/config/tilegx/tilegx-builtins.h =================================================================== --- gcc/config/tilegx/tilegx-builtins.h (revision 197072) +++ gcc/config/tilegx/tilegx-builtins.h (working copy) @@ -193,6 +193,7 @@ enum tilegx_builtin TILEGX_INSN_SHRU, TILEGX_INSN_SHRUX, TILEGX_INSN_SHUFFLEBYTES, + TILEGX_INSN_SHUFFLEBYTES1, TILEGX_INSN_ST, TILEGX_INSN_ST1, TILEGX_INSN_ST2, Index: gcc/config/tilegx/tilegx.c =================================================================== --- gcc/config/tilegx/tilegx.c (revision 197074) +++ gcc/config/tilegx/tilegx.c (working copy) @@ -2897,6 +2897,7 @@ static struct tile_builtin_info tilegx_b { CODE_FOR_lshrdi3, NULL }, /* shru */ { CODE_FOR_lshrsi3, NULL }, /* shrux */ { CODE_FOR_insn_shufflebytes, NULL }, /* shufflebytes */ + { CODE_FOR_insn_shufflebytes1, NULL }, /* shufflebytes1 */ { CODE_FOR_insn_st, NULL }, /* st */ { CODE_FOR_insn_st1, NULL }, /* st1 */ { CODE_FOR_insn_st2, NULL }, /* st2 */ @@ -3225,6 +3226,7 @@ static const struct tilegx_builtin_def t { "__insn_shrux", TILEGX_INSN_SHRUX, true, "iii" }, { "__insn_shruxi", TILEGX_INSN_SHRUX, true, "iii" }, { "__insn_shufflebytes", TILEGX_INSN_SHUFFLEBYTES, true, "llll" }, + { "__insn_shufflebytes1", TILEGX_INSN_SHUFFLEBYTES1, true, "lll" }, { "__insn_st", TILEGX_INSN_ST, false, "vpl" }, { "__insn_st1", TILEGX_INSN_ST1, false, "vpl" }, { "__insn_st2", TILEGX_INSN_ST2, false, "vpl" },