diff mbox

PR53914, rs6000 constraints and reload queries

Message ID 20120801135244.GA3182@bubble.grove.modra.org
State New
Headers show

Commit Message

Alan Modra Aug. 1, 2012, 1:52 p.m. UTC
Hi David,
This is the last of my vendetta against the "o" constraint in the
rs6000 backend.  Remaining are a few places in rs6000.md where the
operand predicate is offsettable_mem_operand, and one instance in
spe.md.  I believe none of these can run into mode_dependent_address
causing "insn does not statisfy its constraints".  Also, with "Y"
replacing "o" everywhere a 64-bit gpr is loaded or stored, we can
remove the +0 wrapper you added for pr13674.

I also add some testcases with this patch.  dfmode_off and tfmode_off
will fail on e500, but the generated code at -O2 is so awful that I'm
inclined to think it should remain that way until someone fixes it!

Bootstrapped and regression tested powerpc64-linux.  OK to apply?

gcc/
	* config/rs6000/rs6000.c (legitimize_reload_address): Remove code
	handling non-aligned ld/std.
	* config/rs6000/paired.md (movv2sf_paired): Use 'Y' instead of 'o'.
	* config/rs6000/vsx.md (vsx_mov, vsx_movti): Likewise.
	* config/rs6000/altivec.md (altivec_mov, altivec_movti): Likewise.
	* config/rs6000/dfp.md (movtd_internal): Use 'm' instead of 'o'.
gcc/testsuite/
	* gcc.target/powerpc/dimode_off.c: New.
	* gcc.target/powerpc/timode_off.c: New.
	* gcc.target/powerpc/dfmode_off.c: New.
	* gcc.target/powerpc/tfmode_off.c: New.

Comments

David Edelsohn Oct. 29, 2012, 8:06 p.m. UTC | #1
On Wed, Aug 1, 2012 at 9:52 AM, Alan Modra <amodra@gmail.com> wrote:
> Hi David,
> This is the last of my vendetta against the "o" constraint in the
> rs6000 backend.  Remaining are a few places in rs6000.md where the
> operand predicate is offsettable_mem_operand, and one instance in
> spe.md.  I believe none of these can run into mode_dependent_address
> causing "insn does not statisfy its constraints".  Also, with "Y"
> replacing "o" everywhere a 64-bit gpr is loaded or stored, we can
> remove the +0 wrapper you added for pr13674.
>
> I also add some testcases with this patch.  dfmode_off and tfmode_off
> will fail on e500, but the generated code at -O2 is so awful that I'm
> inclined to think it should remain that way until someone fixes it!
>
> Bootstrapped and regression tested powerpc64-linux.  OK to apply?
>
> gcc/
>         * config/rs6000/rs6000.c (legitimize_reload_address): Remove code
>         handling non-aligned ld/std.
>         * config/rs6000/paired.md (movv2sf_paired): Use 'Y' instead of 'o'.
>         * config/rs6000/vsx.md (vsx_mov, vsx_movti): Likewise.
>         * config/rs6000/altivec.md (altivec_mov, altivec_movti): Likewise.
>         * config/rs6000/dfp.md (movtd_internal): Use 'm' instead of 'o'.
> gcc/testsuite/
>         * gcc.target/powerpc/dimode_off.c: New.
>         * gcc.target/powerpc/timode_off.c: New.
>         * gcc.target/powerpc/dfmode_off.c: New.
>         * gcc.target/powerpc/tfmode_off.c: New.

This is okay.

Thanks, David
diff mbox

Patch

Index: gcc/testsuite/gcc.target/powerpc/dimode_off.c
===================================================================
--- gcc/testsuite/gcc.target/powerpc/dimode_off.c	(revision 0)
+++ gcc/testsuite/gcc.target/powerpc/dimode_off.c	(revision 0)
@@ -0,0 +1,50 @@ 
+/* { dg-do assemble } */
+/* { dg-options "-O2 -fno-align-functions -mtraceback=no -save-temps" } */
+
+void w1 (void *x, long long y) { *(long long *) (x + 32767) = y; }
+void w2 (void *x, long long y) { *(long long *) (x + 32766) = y; }
+void w3 (void *x, long long y) { *(long long *) (x + 32765) = y; }
+void w4 (void *x, long long y) { *(long long *) (x + 32764) = y; }
+void w5 (void *x, long long y) { *(long long *) (x + 32763) = y; }
+void w6 (void *x, long long y) { *(long long *) (x + 32762) = y; }
+void w7 (void *x, long long y) { *(long long *) (x + 32761) = y; }
+void w8 (void *x, long long y) { *(long long *) (x + 32760) = y; }
+void w9 (void *x, long long y) { *(long long *) (x + 32759) = y; }
+void w10 (void *x, long long y) { *(long long *) (x + 32758) = y; }
+void w11 (void *x, long long y) { *(long long *) (x + 32757) = y; }
+void w12 (void *x, long long y) { *(long long *) (x + 32756) = y; }
+void w13 (void *x, long long y) { *(long long *) (x + 32755) = y; }
+void w14 (void *x, long long y) { *(long long *) (x + 32754) = y; }
+void w15 (void *x, long long y) { *(long long *) (x + 32753) = y; }
+void w16 (void *x, long long y) { *(long long *) (x + 32752) = y; }
+void w17 (void *x, long long y) { *(long long *) (x + 32751) = y; }
+void w18 (void *x, long long y) { *(long long *) (x + 32750) = y; }
+void w19 (void *x, long long y) { *(long long *) (x + 32749) = y; }
+void w20 (void *x, long long y) { *(long long *) (x + 32748) = y; }
+
+long long r1 (void *x) { return *(long long *) (x + 32767); }
+long long r2 (void *x) { return *(long long *) (x + 32766); }
+long long r3 (void *x) { return *(long long *) (x + 32765); }
+long long r4 (void *x) { return *(long long *) (x + 32764); }
+long long r5 (void *x) { return *(long long *) (x + 32763); }
+long long r6 (void *x) { return *(long long *) (x + 32762); }
+long long r7 (void *x) { return *(long long *) (x + 32761); }
+long long r8 (void *x) { return *(long long *) (x + 32760); }
+long long r9 (void *x) { return *(long long *) (x + 32759); }
+long long r10 (void *x) { return *(long long *) (x + 32758); }
+long long r11 (void *x) { return *(long long *) (x + 32757); }
+long long r12 (void *x) { return *(long long *) (x + 32756); }
+long long r13 (void *x) { return *(long long *) (x + 32755); }
+long long r14 (void *x) { return *(long long *) (x + 32754); }
+long long r15 (void *x) { return *(long long *) (x + 32753); }
+long long r16 (void *x) { return *(long long *) (x + 32752); }
+long long r17 (void *x) { return *(long long *) (x + 32751); }
+long long r18 (void *x) { return *(long long *) (x + 32750); }
+long long r19 (void *x) { return *(long long *) (x + 32749); }
+long long r20 (void *x) { return *(long long *) (x + 32748); }
+
+/* { dg-final { object-size text == 440 { target { lp64 } } } } */
+/* 32-bit test should really be == 512 bytes, see pr54110 */
+/* { dg-final { object-size text <= 640 { target { ilp32 } } } } */
+/* { dg-final { scan-assembler-not "(st|l)fd" } } */
+/* { dg-final { cleanup-saved-temps "dimode_off" } } */
Index: gcc/testsuite/gcc.target/powerpc/timode_off.c
===================================================================
--- gcc/testsuite/gcc.target/powerpc/timode_off.c	(revision 0)
+++ gcc/testsuite/gcc.target/powerpc/timode_off.c	(revision 0)
@@ -0,0 +1,51 @@ 
+/* { dg-do assemble { target { lp64 } } } */
+/* { dg-options "-O2 -fno-align-functions -mtraceback=no -save-temps" } */
+
+typedef int TImode __attribute__ ((mode (TI)));
+
+void w1 (void *x, TImode y) { *(TImode *) (x + 32767) = y; }
+void w2 (void *x, TImode y) { *(TImode *) (x + 32766) = y; }
+void w3 (void *x, TImode y) { *(TImode *) (x + 32765) = y; }
+void w4 (void *x, TImode y) { *(TImode *) (x + 32764) = y; }
+void w5 (void *x, TImode y) { *(TImode *) (x + 32763) = y; }
+void w6 (void *x, TImode y) { *(TImode *) (x + 32762) = y; }
+void w7 (void *x, TImode y) { *(TImode *) (x + 32761) = y; }
+void w8 (void *x, TImode y) { *(TImode *) (x + 32760) = y; }
+void w9 (void *x, TImode y) { *(TImode *) (x + 32759) = y; }
+void w10 (void *x, TImode y) { *(TImode *) (x + 32758) = y; }
+void w11 (void *x, TImode y) { *(TImode *) (x + 32757) = y; }
+void w12 (void *x, TImode y) { *(TImode *) (x + 32756) = y; }
+void w13 (void *x, TImode y) { *(TImode *) (x + 32755) = y; }
+void w14 (void *x, TImode y) { *(TImode *) (x + 32754) = y; }
+void w15 (void *x, TImode y) { *(TImode *) (x + 32753) = y; }
+void w16 (void *x, TImode y) { *(TImode *) (x + 32752) = y; }
+void w17 (void *x, TImode y) { *(TImode *) (x + 32751) = y; }
+void w18 (void *x, TImode y) { *(TImode *) (x + 32750) = y; }
+void w19 (void *x, TImode y) { *(TImode *) (x + 32749) = y; }
+void w20 (void *x, TImode y) { *(TImode *) (x + 32748) = y; }
+
+TImode r1 (void *x) { return *(TImode *) (x + 32767); }
+TImode r2 (void *x) { return *(TImode *) (x + 32766); }
+TImode r3 (void *x) { return *(TImode *) (x + 32765); }
+TImode r4 (void *x) { return *(TImode *) (x + 32764); }
+TImode r5 (void *x) { return *(TImode *) (x + 32763); }
+TImode r6 (void *x) { return *(TImode *) (x + 32762); }
+TImode r7 (void *x) { return *(TImode *) (x + 32761); }
+TImode r8 (void *x) { return *(TImode *) (x + 32760); }
+TImode r9 (void *x) { return *(TImode *) (x + 32759); }
+TImode r10 (void *x) { return *(TImode *) (x + 32758); }
+TImode r11 (void *x) { return *(TImode *) (x + 32757); }
+TImode r12 (void *x) { return *(TImode *) (x + 32756); }
+TImode r13 (void *x) { return *(TImode *) (x + 32755); }
+TImode r14 (void *x) { return *(TImode *) (x + 32754); }
+TImode r15 (void *x) { return *(TImode *) (x + 32753); }
+TImode r16 (void *x) { return *(TImode *) (x + 32752); }
+TImode r17 (void *x) { return *(TImode *) (x + 32751); }
+TImode r18 (void *x) { return *(TImode *) (x + 32750); }
+TImode r19 (void *x) { return *(TImode *) (x + 32749); }
+TImode r20 (void *x) { return *(TImode *) (x + 32748); }
+
+/* test should really be == 616, see pr54110 */
+/* { dg-final { object-size text <= 700 } } */
+/* { dg-final { scan-assembler-not "(st|l)fd" } } */
+/* { dg-final { cleanup-saved-temps "timode_off" } } */
Index: gcc/testsuite/gcc.target/powerpc/dfmode_off.c
===================================================================
--- gcc/testsuite/gcc.target/powerpc/dfmode_off.c	(revision 0)
+++ gcc/testsuite/gcc.target/powerpc/dfmode_off.c	(revision 0)
@@ -0,0 +1,47 @@ 
+/* { dg-do assemble } */
+/* { dg-options "-O2 -fno-align-functions -mtraceback=no -save-temps" } */
+
+void w1 (void *x, double y) { *(double *) (x + 32767) = y; }
+void w2 (void *x, double y) { *(double *) (x + 32766) = y; }
+void w3 (void *x, double y) { *(double *) (x + 32765) = y; }
+void w4 (void *x, double y) { *(double *) (x + 32764) = y; }
+void w5 (void *x, double y) { *(double *) (x + 32763) = y; }
+void w6 (void *x, double y) { *(double *) (x + 32762) = y; }
+void w7 (void *x, double y) { *(double *) (x + 32761) = y; }
+void w8 (void *x, double y) { *(double *) (x + 32760) = y; }
+void w9 (void *x, double y) { *(double *) (x + 32759) = y; }
+void w10 (void *x, double y) { *(double *) (x + 32758) = y; }
+void w11 (void *x, double y) { *(double *) (x + 32757) = y; }
+void w12 (void *x, double y) { *(double *) (x + 32756) = y; }
+void w13 (void *x, double y) { *(double *) (x + 32755) = y; }
+void w14 (void *x, double y) { *(double *) (x + 32754) = y; }
+void w15 (void *x, double y) { *(double *) (x + 32753) = y; }
+void w16 (void *x, double y) { *(double *) (x + 32752) = y; }
+void w17 (void *x, double y) { *(double *) (x + 32751) = y; }
+void w18 (void *x, double y) { *(double *) (x + 32750) = y; }
+void w19 (void *x, double y) { *(double *) (x + 32749) = y; }
+void w20 (void *x, double y) { *(double *) (x + 32748) = y; }
+
+double r1 (void *x) { return *(double *) (x + 32767); }
+double r2 (void *x) { return *(double *) (x + 32766); }
+double r3 (void *x) { return *(double *) (x + 32765); }
+double r4 (void *x) { return *(double *) (x + 32764); }
+double r5 (void *x) { return *(double *) (x + 32763); }
+double r6 (void *x) { return *(double *) (x + 32762); }
+double r7 (void *x) { return *(double *) (x + 32761); }
+double r8 (void *x) { return *(double *) (x + 32760); }
+double r9 (void *x) { return *(double *) (x + 32759); }
+double r10 (void *x) { return *(double *) (x + 32758); }
+double r11 (void *x) { return *(double *) (x + 32757); }
+double r12 (void *x) { return *(double *) (x + 32756); }
+double r13 (void *x) { return *(double *) (x + 32755); }
+double r14 (void *x) { return *(double *) (x + 32754); }
+double r15 (void *x) { return *(double *) (x + 32753); }
+double r16 (void *x) { return *(double *) (x + 32752); }
+double r17 (void *x) { return *(double *) (x + 32751); }
+double r18 (void *x) { return *(double *) (x + 32750); }
+double r19 (void *x) { return *(double *) (x + 32749); }
+double r20 (void *x) { return *(double *) (x + 32748); }
+
+/* { dg-final { object-size text == 320 } } */
+/* { dg-final { cleanup-saved-temps "dfmode_off" } } */
Index: gcc/testsuite/gcc.target/powerpc/tfmode_off.c
===================================================================
--- gcc/testsuite/gcc.target/powerpc/tfmode_off.c	(revision 0)
+++ gcc/testsuite/gcc.target/powerpc/tfmode_off.c	(revision 0)
@@ -0,0 +1,49 @@ 
+/* { dg-do assemble } */
+/* { dg-options "-O2 -fno-align-functions -mtraceback=no -save-temps" } */
+
+typedef float TFmode __attribute__ ((mode (TF)));
+
+void w1 (void *x, TFmode y) { *(TFmode *) (x + 32767) = y; }
+void w2 (void *x, TFmode y) { *(TFmode *) (x + 32766) = y; }
+void w3 (void *x, TFmode y) { *(TFmode *) (x + 32765) = y; }
+void w4 (void *x, TFmode y) { *(TFmode *) (x + 32764) = y; }
+void w5 (void *x, TFmode y) { *(TFmode *) (x + 32763) = y; }
+void w6 (void *x, TFmode y) { *(TFmode *) (x + 32762) = y; }
+void w7 (void *x, TFmode y) { *(TFmode *) (x + 32761) = y; }
+void w8 (void *x, TFmode y) { *(TFmode *) (x + 32760) = y; }
+void w9 (void *x, TFmode y) { *(TFmode *) (x + 32759) = y; }
+void w10 (void *x, TFmode y) { *(TFmode *) (x + 32758) = y; }
+void w11 (void *x, TFmode y) { *(TFmode *) (x + 32757) = y; }
+void w12 (void *x, TFmode y) { *(TFmode *) (x + 32756) = y; }
+void w13 (void *x, TFmode y) { *(TFmode *) (x + 32755) = y; }
+void w14 (void *x, TFmode y) { *(TFmode *) (x + 32754) = y; }
+void w15 (void *x, TFmode y) { *(TFmode *) (x + 32753) = y; }
+void w16 (void *x, TFmode y) { *(TFmode *) (x + 32752) = y; }
+void w17 (void *x, TFmode y) { *(TFmode *) (x + 32751) = y; }
+void w18 (void *x, TFmode y) { *(TFmode *) (x + 32750) = y; }
+void w19 (void *x, TFmode y) { *(TFmode *) (x + 32749) = y; }
+void w20 (void *x, TFmode y) { *(TFmode *) (x + 32748) = y; }
+
+TFmode r1 (void *x) { return *(TFmode *) (x + 32767); }
+TFmode r2 (void *x) { return *(TFmode *) (x + 32766); }
+TFmode r3 (void *x) { return *(TFmode *) (x + 32765); }
+TFmode r4 (void *x) { return *(TFmode *) (x + 32764); }
+TFmode r5 (void *x) { return *(TFmode *) (x + 32763); }
+TFmode r6 (void *x) { return *(TFmode *) (x + 32762); }
+TFmode r7 (void *x) { return *(TFmode *) (x + 32761); }
+TFmode r8 (void *x) { return *(TFmode *) (x + 32760); }
+TFmode r9 (void *x) { return *(TFmode *) (x + 32759); }
+TFmode r10 (void *x) { return *(TFmode *) (x + 32758); }
+TFmode r11 (void *x) { return *(TFmode *) (x + 32757); }
+TFmode r12 (void *x) { return *(TFmode *) (x + 32756); }
+TFmode r13 (void *x) { return *(TFmode *) (x + 32755); }
+TFmode r14 (void *x) { return *(TFmode *) (x + 32754); }
+TFmode r15 (void *x) { return *(TFmode *) (x + 32753); }
+TFmode r16 (void *x) { return *(TFmode *) (x + 32752); }
+TFmode r17 (void *x) { return *(TFmode *) (x + 32751); }
+TFmode r18 (void *x) { return *(TFmode *) (x + 32750); }
+TFmode r19 (void *x) { return *(TFmode *) (x + 32749); }
+TFmode r20 (void *x) { return *(TFmode *) (x + 32748); }
+
+/* { dg-final { object-size text == 544 } } */
+/* { dg-final { cleanup-saved-temps "tfmode_off" } } */
Index: gcc/config/rs6000/rs6000.c
===================================================================
--- gcc/config/rs6000/rs6000.c	(revision 190035)
+++ gcc/config/rs6000/rs6000.c	(working copy)
@@ -6165,29 +6165,8 @@ 
       return x;
     }
 
-  /* Force ld/std non-word aligned offset into base register by wrapping
-     in offset 0.  */
   if (GET_CODE (x) == PLUS
       && GET_CODE (XEXP (x, 0)) == REG
-      && REGNO (XEXP (x, 0)) < 32
-      && INT_REG_OK_FOR_BASE_P (XEXP (x, 0), 1)
-      && GET_CODE (XEXP (x, 1)) == CONST_INT
-      && reg_offset_p
-      && (INTVAL (XEXP (x, 1)) & 3) != 0
-      && VECTOR_MEM_NONE_P (mode)
-      && GET_MODE_SIZE (mode) >= UNITS_PER_WORD
-      && TARGET_POWERPC64)
-    {
-      x = gen_rtx_PLUS (GET_MODE (x), x, GEN_INT (0));
-      push_reload (XEXP (x, 0), NULL_RTX, &XEXP (x, 0), NULL,
-		   BASE_REG_CLASS, GET_MODE (x), VOIDmode, 0, 0,
-		   opnum, (enum reload_type) type);
-      *win = 1;
-      return x;
-    }
-
-  if (GET_CODE (x) == PLUS
-      && GET_CODE (XEXP (x, 0)) == REG
       && REGNO (XEXP (x, 0)) < FIRST_PSEUDO_REGISTER
       && INT_REG_OK_FOR_BASE_P (XEXP (x, 0), 1)
       && GET_CODE (XEXP (x, 1)) == CONST_INT
Index: gcc/config/rs6000/vsx.md
===================================================================
--- gcc/config/rs6000/vsx.md	(revision 190035)
+++ gcc/config/rs6000/vsx.md	(working copy)
@@ -209,8 +209,8 @@ 
 
 ;; VSX moves
 (define_insn "*vsx_mov<mode>"
-  [(set (match_operand:VSX_M 0 "nonimmediate_operand" "=Z,<VSr>,<VSr>,?Z,?wa,?wa,*o,*r,*r,<VSr>,?wa,v,wZ,v")
-	(match_operand:VSX_M 1 "input_operand" "<VSr>,Z,<VSr>,wa,Z,wa,r,o,r,j,j,W,v,wZ"))]
+  [(set (match_operand:VSX_M 0 "nonimmediate_operand" "=Z,<VSr>,<VSr>,?Z,?wa,?wa,*Y,*r,*r,<VSr>,?wa,v,wZ,v")
+	(match_operand:VSX_M 1 "input_operand" "<VSr>,Z,<VSr>,wa,Z,wa,r,Y,r,j,j,W,v,wZ"))]
   "VECTOR_MEM_VSX_P (<MODE>mode)
    && (register_operand (operands[0], <MODE>mode) 
        || register_operand (operands[1], <MODE>mode))"
@@ -272,8 +272,8 @@ 
 ;; Unlike other VSX moves, allow the GPRs, since a normal use of TImode is for
 ;; unions.  However for plain data movement, slightly favor the vector loads
 (define_insn "*vsx_movti"
-  [(set (match_operand:TI 0 "nonimmediate_operand" "=Z,wa,wa,?o,?r,?r,wa,v,v,wZ")
-	(match_operand:TI 1 "input_operand" "wa,Z,wa,r,o,r,j,W,wZ,v"))]
+  [(set (match_operand:TI 0 "nonimmediate_operand" "=Z,wa,wa,?Y,?r,?r,wa,v,v,wZ")
+	(match_operand:TI 1 "input_operand" "wa,Z,wa,r,Y,r,j,W,wZ,v"))]
   "VECTOR_MEM_VSX_P (TImode)
    && (register_operand (operands[0], TImode) 
        || register_operand (operands[1], TImode))"
Index: gcc/config/rs6000/altivec.md
===================================================================
--- gcc/config/rs6000/altivec.md	(revision 190035)
+++ gcc/config/rs6000/altivec.md	(working copy)
@@ -165,8 +165,8 @@ 
 
 ;; Vector move instructions.
 (define_insn "*altivec_mov<mode>"
-  [(set (match_operand:VM2 0 "nonimmediate_operand" "=Z,v,v,*o,*r,*r,v,v")
-	(match_operand:VM2 1 "input_operand" "v,Z,v,r,o,r,j,W"))]
+  [(set (match_operand:VM2 0 "nonimmediate_operand" "=Z,v,v,*Y,*r,*r,v,v")
+	(match_operand:VM2 1 "input_operand" "v,Z,v,r,Y,r,j,W"))]
   "VECTOR_MEM_ALTIVEC_P (<MODE>mode)
    && (register_operand (operands[0], <MODE>mode) 
        || register_operand (operands[1], <MODE>mode))"
@@ -190,8 +190,8 @@ 
 ;; is for unions.  However for plain data movement, slightly favor the vector
 ;; loads
 (define_insn "*altivec_movti"
-  [(set (match_operand:TI 0 "nonimmediate_operand" "=Z,v,v,?o,?r,?r,v,v")
-	(match_operand:TI 1 "input_operand" "v,Z,v,r,o,r,j,W"))]
+  [(set (match_operand:TI 0 "nonimmediate_operand" "=Z,v,v,?Y,?r,?r,v,v")
+	(match_operand:TI 1 "input_operand" "v,Z,v,r,Y,r,j,W"))]
   "VECTOR_MEM_ALTIVEC_P (TImode)
    && (register_operand (operands[0], TImode) 
        || register_operand (operands[1], TImode))"
Index: gcc/config/rs6000/dfp.md
===================================================================
--- gcc/config/rs6000/dfp.md	(revision 190035)
+++ gcc/config/rs6000/dfp.md	(working copy)
@@ -426,12 +426,12 @@ 
   "TARGET_HARD_FLOAT && TARGET_FPRS"
   "{ rs6000_emit_move (operands[0], operands[1], TDmode); DONE; }")
 
-; It's important to list the o->f and f->o moves before f->f because
-; otherwise reload, given m->f, will try to pick f->f and reload it,
-; which doesn't make progress.  Likewise r->Y must be before r->r.
+; It's important to list the Y->r and r->Y moves before r->r because
+; otherwise reload, given m->r, will try to pick r->r and reload it,
+; which doesn't make progress.
 (define_insn_and_split "*movtd_internal"
-  [(set (match_operand:TD 0 "nonimmediate_operand" "=o,d,d,r,Y,r")
-	(match_operand:TD 1 "input_operand"         "d,o,d,YGHF,r,r"))]
+  [(set (match_operand:TD 0 "nonimmediate_operand" "=m,d,d,Y,r,r")
+	(match_operand:TD 1 "input_operand"         "d,m,d,r,YGHF,r"))]
   "TARGET_HARD_FLOAT && TARGET_FPRS
    && (gpc_reg_operand (operands[0], TDmode)
        || gpc_reg_operand (operands[1], TDmode))"
Index: gcc/config/rs6000/paired.md
===================================================================
--- gcc/config/rs6000/paired.md	(revision 190035)
+++ gcc/config/rs6000/paired.md	(working copy)
@@ -201,8 +201,8 @@ 
   [(set_attr "type" "fp")])
 
 (define_insn "*movv2sf_paired"
-  [(set (match_operand:V2SF 0 "nonimmediate_operand" "=Z,f,f,o,r,r,f")
-		 (match_operand:V2SF 1 "input_operand" "f,Z,f,r,o,r,W"))]
+  [(set (match_operand:V2SF 0 "nonimmediate_operand" "=Z,f,f,Y,r,r,f")
+		 (match_operand:V2SF 1 "input_operand" "f,Z,f,r,Y,r,W"))]
   "TARGET_PAIRED_FLOAT
    && (register_operand (operands[0], V2SFmode) 
        || register_operand (operands[1], V2SFmode))"