From patchwork Tue Oct 25 21:09:44 2011 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "H.J. Lu" X-Patchwork-Id: 121788 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from sourceware.org (server1.sourceware.org [209.132.180.131]) by ozlabs.org (Postfix) with SMTP id A319B1007DB for ; Wed, 26 Oct 2011 08:10:06 +1100 (EST) Received: (qmail 30450 invoked by alias); 25 Oct 2011 21:10:00 -0000 Received: (qmail 30437 invoked by uid 22791); 25 Oct 2011 21:09:59 -0000 X-SWARE-Spam-Status: No, hits=-1.7 required=5.0 tests=AWL, BAYES_00, NO_DNS_FOR_FROM, RP_MATCHES_RCVD, SARE_SUB_OBFU_Q0 X-Spam-Check-By: sourceware.org Received: from mga03.intel.com (HELO mga03.intel.com) (143.182.124.21) by sourceware.org (qpsmtpd/0.43rc1) with ESMTP; Tue, 25 Oct 2011 21:09:45 +0000 Received: from azsmga001.ch.intel.com ([10.2.17.19]) by azsmga101.ch.intel.com with ESMTP; 25 Oct 2011 14:09:45 -0700 X-ExtLoop1: 1 Received: from gnu-6.sc.intel.com ([10.3.194.135]) by azsmga001.ch.intel.com with ESMTP; 25 Oct 2011 14:09:44 -0700 Received: by gnu-6.sc.intel.com (Postfix, from userid 500) id 9D349C18FD; Tue, 25 Oct 2011 14:09:44 -0700 (PDT) Date: Tue, 25 Oct 2011 14:09:44 -0700 From: "H.J. Lu" To: gcc-patches@gcc.gnu.org Cc: ubizjak@gmail.com Subject: PATCH: Remove *mmx_maskmovq_rex Message-ID: <20111025210944.GA2868@intel.com> Reply-To: "H.J. Lu" MIME-Version: 1.0 Content-Disposition: inline User-Agent: Mutt/1.5.21 (2010-09-15) Mailing-List: contact gcc-patches-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: List-Unsubscribe: List-Archive: List-Post: List-Help: Sender: gcc-patches-owner@gcc.gnu.org Delivered-To: mailing list gcc-patches@gcc.gnu.org Hi, There is no difference bewteen *mmx_maskmovq_rex and *mmx_maskmovq_rex execept for :SI vs :DI. This patch removes *mmx_maskmovq_rex and use :P instead. OK for trunk if there are no regressions? Thanks. H.J. --- 2011-10-25 H.J. Lu * config/i386/mmx.md (*mmx_maskmovq): Replace :SI with :P and remove "&& !TARGET_64BIT" (*mmx_maskmovq_rex): Removed. diff --git a/gcc/config/i386/mmx.md b/gcc/config/i386/mmx.md index f3b949e..37a79f8 100644 --- a/gcc/config/i386/mmx.md +++ b/gcc/config/i386/mmx.md @@ -1620,24 +1620,12 @@ "TARGET_SSE || TARGET_3DNOW_A") (define_insn "*mmx_maskmovq" - [(set (mem:V8QI (match_operand:SI 0 "register_operand" "D")) + [(set (mem:V8QI (match_operand:P 0 "register_operand" "D")) (unspec:V8QI [(match_operand:V8QI 1 "register_operand" "y") (match_operand:V8QI 2 "register_operand" "y") (mem:V8QI (match_dup 0))] UNSPEC_MASKMOV))] - "(TARGET_SSE || TARGET_3DNOW_A) && !TARGET_64BIT" - ;; @@@ check ordering of operands in intel/nonintel syntax - "maskmovq\t{%2, %1|%1, %2}" - [(set_attr "type" "mmxcvt") - (set_attr "mode" "DI")]) - -(define_insn "*mmx_maskmovq_rex" - [(set (mem:V8QI (match_operand:DI 0 "register_operand" "D")) - (unspec:V8QI [(match_operand:V8QI 1 "register_operand" "y") - (match_operand:V8QI 2 "register_operand" "y") - (mem:V8QI (match_dup 0))] - UNSPEC_MASKMOV))] - "(TARGET_SSE || TARGET_3DNOW_A) && TARGET_64BIT" + "TARGET_SSE || TARGET_3DNOW_A" ;; @@@ check ordering of operands in intel/nonintel syntax "maskmovq\t{%2, %1|%1, %2}" [(set_attr "type" "mmxcvt")