From patchwork Tue May 24 15:54:24 2011 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "H.J. Lu" X-Patchwork-Id: 97178 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from sourceware.org (server1.sourceware.org [209.132.180.131]) by ozlabs.org (Postfix) with SMTP id 671EEB6F85 for ; Wed, 25 May 2011 01:54:41 +1000 (EST) Received: (qmail 6649 invoked by alias); 24 May 2011 15:54:39 -0000 Received: (qmail 6641 invoked by uid 22791); 24 May 2011 15:54:38 -0000 X-SWARE-Spam-Status: No, hits=-1.4 required=5.0 tests=AWL, BAYES_00, NO_DNS_FOR_FROM, T_RP_MATCHES_RCVD X-Spam-Check-By: sourceware.org Received: from mga02.intel.com (HELO mga02.intel.com) (134.134.136.20) by sourceware.org (qpsmtpd/0.43rc1) with ESMTP; Tue, 24 May 2011 15:54:25 +0000 Received: from orsmga002.jf.intel.com ([10.7.209.21]) by orsmga101.jf.intel.com with ESMTP; 24 May 2011 08:54:24 -0700 X-ExtLoop1: 1 Received: from gnu-6.sc.intel.com ([10.3.194.135]) by orsmga002.jf.intel.com with ESMTP; 24 May 2011 08:54:24 -0700 Received: by gnu-6.sc.intel.com (Postfix, from userid 500) id 44F44180DAC; Tue, 24 May 2011 08:54:24 -0700 (PDT) Date: Tue, 24 May 2011 08:54:24 -0700 From: "H.J. Lu" To: gcc-patches@gcc.gnu.org Cc: Uros Bizjak Subject: PATCH: PR target/49142: Invalid 8bit register operand Message-ID: <20110524155424.GA7400@intel.com> Reply-To: "H.J. Lu" MIME-Version: 1.0 Content-Disposition: inline User-Agent: Mutt/1.5.21 (2010-09-15) Mailing-List: contact gcc-patches-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: List-Unsubscribe: List-Archive: List-Post: List-Help: Sender: gcc-patches-owner@gcc.gnu.org Delivered-To: mailing list gcc-patches@gcc.gnu.org Hi, We are working on a new optimization, which turns off TARGET_MOVX. GCC generates: movb %ah, %dil But %ah can only be used with %[abcd][hl]. This patch adds QIreg_operand and uses it in *movqi_extv_1_rex64/*movqi_extzv_2_rex64. OK for trunk if there is no regression? Thanks. H.J. --- 2011-05-24 H.J. Lu PR target/49142 * config/i386/i386.md (*movqi_extv_1_rex64): Replace q_regs_operand with QIreg_operand. (*movqi_extzv_2_rex64): Likewise. * config/i386/predicates.md (QIreg_operand): New. diff --git a/gcc/config/i386/i386.md b/gcc/config/i386/i386.md index 6c158cf..b7f5866 100644 --- a/gcc/config/i386/i386.md +++ b/gcc/config/i386/i386.md @@ -2635,7 +2635,7 @@ } [(set (attr "type") (if_then_else (and (match_operand:QI 0 "register_operand" "") - (ior (not (match_operand:QI 0 "q_regs_operand" "")) + (ior (not (match_operand:QI 0 "QIreg_operand" "")) (ne (symbol_ref "TARGET_MOVX") (const_int 0)))) (const_string "imovx") @@ -2699,7 +2699,7 @@ } } [(set (attr "type") - (if_then_else (ior (not (match_operand:QI 0 "q_regs_operand" "")) + (if_then_else (ior (not (match_operand:QI 0 "QIreg_operand" "")) (ne (symbol_ref "TARGET_MOVX") (const_int 0))) (const_string "imovx") diff --git a/gcc/config/i386/predicates.md b/gcc/config/i386/predicates.md index 8a89f70..1471f5a 100644 --- a/gcc/config/i386/predicates.md +++ b/gcc/config/i386/predicates.md @@ -82,6 +82,10 @@ (and (match_code "reg") (match_test "REGNO (op) == FLAGS_REG"))) +;; Return true if op is one of QImode registers: %[abcd][hl]. +(define_predicate "QIreg_operand" + (match_test "QI_REG_P (op)")) + ;; Return true if op is a QImode register operand other than ;; %[abcd][hl]. (define_predicate "ext_QIreg_operand"