diff mbox

[appplied] ARM Cortex-M3 CPU

Message ID 201006091600.55311.paul@codesourcery.com
State New
Headers show

Commit Message

Paul Brook June 9, 2010, 3 p.m. UTC
The attached patch adds nominal support for the ARM Cortex-M4 CPU core.
All the interesting bits are already there, this just adds the cpu name.

Tested on arm-none-eabi.
Applied to SVN trunk.

Paul

2010-10-09  Paul Brook  <paul@codesourcery.com>
 
	gcc/
	* doc/invoke.texi: Document ARM -mcpu=cortex-m4.
	* config/arm/arm.c (all_architectures): Change v7e-m default to
	cortexm4.
	* config/arm/arm-cores.def: Add cortex-m4.
	* config/arm/arm-tune.md: Regenerate.

Comments

Joseph Myers June 11, 2010, 10:50 a.m. UTC | #1
On Wed, 9 Jun 2010, Paul Brook wrote:

> The attached patch adds nominal support for the ARM Cortex-M4 CPU core.
> All the interesting bits are already there, this just adds the cpu name.
> 
> Tested on arm-none-eabi.
> Applied to SVN trunk.

I don't see any sign of this actually having been committed.
Paul Brook June 11, 2010, 3:48 p.m. UTC | #2
> > The attached patch adds nominal support for the ARM Cortex-M4 CPU core.
> > All the interesting bits are already there, this just adds the cpu name.
> > 
> > Tested on arm-none-eabi.
> > Applied to SVN trunk.
> 
> I don't see any sign of this actually having been committed.

Bah! It has now.

Paul
Joseph Myers June 11, 2010, 3:51 p.m. UTC | #3
On Fri, 11 Jun 2010, Paul Brook wrote:

> > > The attached patch adds nominal support for the ARM Cortex-M4 CPU core.
> > > All the interesting bits are already there, this just adds the cpu name.
> > > 
> > > Tested on arm-none-eabi.
> > > Applied to SVN trunk.
> > 
> > I don't see any sign of this actually having been committed.
> 
> Bah! It has now.

Remember the patch tracker update now....  (I noticed the lack of a commit 
when doing some patch tracker updates earlier.)
diff mbox

Patch

Index: gcc/doc/invoke.texi
===================================================================
--- gcc/doc/invoke.texi	(revision 160360)
+++ gcc/doc/invoke.texi	(working copy)
@@ -9912,7 +9912,7 @@  assembly code.  Permissible names are: @
 @samp{arm1136j-s}, @samp{arm1136jf-s}, @samp{mpcore}, @samp{mpcorenovfp},
 @samp{arm1156t2-s}, @samp{arm1156t2f-s}, @samp{arm1176jz-s}, @samp{arm1176jzf-s},
 @samp{cortex-a5}, @samp{cortex-a8}, @samp{cortex-a9},
-@samp{cortex-r4}, @samp{cortex-r4f}, @samp{cortex-m3},
+@samp{cortex-r4}, @samp{cortex-r4f}, @samp{cortex-m4}, @samp{cortex-m3},
 @samp{cortex-m1},
 @samp{cortex-m0},
 @samp{xscale}, @samp{iwmmxt}, @samp{iwmmxt2}, @samp{ep9312}.
Index: gcc/config/arm/arm.c
===================================================================
--- gcc/config/arm/arm.c	(revision 160360)
+++ gcc/config/arm/arm.c	(working copy)
@@ -806,7 +806,7 @@  static const struct processors all_archi
   {"armv7-a", cortexa8,	  "7A",	 FL_CO_PROC |		  FL_FOR_ARCH7A, NULL},
   {"armv7-r", cortexr4,	  "7R",	 FL_CO_PROC |		  FL_FOR_ARCH7R, NULL},
   {"armv7-m", cortexm3,	  "7M",	 FL_CO_PROC |		  FL_FOR_ARCH7M, NULL},
-  {"armv7e-m",   cortexm3, "7EM", FL_CO_PROC |		  FL_FOR_ARCH7EM, NULL},
+  {"armv7e-m", cortexm4,  "7EM", FL_CO_PROC |		  FL_FOR_ARCH7EM, NULL},
   {"ep9312",  ep9312,     "4T",  FL_LDSCHED | FL_CIRRUS | FL_FOR_ARCH4, NULL},
   {"iwmmxt",  iwmmxt,     "5TE", FL_LDSCHED | FL_STRONG | FL_FOR_ARCH5TE | FL_XSCALE | FL_IWMMXT , NULL},
   {"iwmmxt2", iwmmxt2,     "5TE", FL_LDSCHED | FL_STRONG | FL_FOR_ARCH5TE | FL_XSCALE | FL_IWMMXT , NULL},
Index: gcc/config/arm/arm-cores.def
===================================================================
--- gcc/config/arm/arm-cores.def	(revision 160360)
+++ gcc/config/arm/arm-cores.def	(working copy)
@@ -123,6 +123,7 @@  ARM_CORE("cortex-a8",	  cortexa8,	7A,
 ARM_CORE("cortex-a9",	  cortexa9,	7A,				 FL_LDSCHED, 9e)
 ARM_CORE("cortex-r4",	  cortexr4,	7R,				 FL_LDSCHED, 9e)
 ARM_CORE("cortex-r4f",	  cortexr4f,	7R,				 FL_LDSCHED, 9e)
+ARM_CORE("cortex-m4",	  cortexm4,	7EM,				 FL_LDSCHED, 9e)
 ARM_CORE("cortex-m3",	  cortexm3,	7M,				 FL_LDSCHED, 9e)
 ARM_CORE("cortex-m1",	  cortexm1,	6M,				 FL_LDSCHED, 9e)
 ARM_CORE("cortex-m0",	  cortexm0,	6M,				 FL_LDSCHED, 9e)