diff mbox series

[committed,amdgcn] Fix conditional add LRA failure

Message ID 1e40b7b8-b712-1959-8bdf-039eef98b5be@codesourcery.com
State New
Headers show
Series [committed,amdgcn] Fix conditional add LRA failure | expand

Commit Message

Andrew Stubbs Jan. 31, 2020, 4:10 p.m. UTC 
This patch fixes an ICE in testcase 
gfortran.dg/assumed_rank_bounds_3.f90. The ICE is "unable to generate 
reloads" and is caused by LRA wanting to use the same match constraint 
for two distinct operands.

It would be nice if LRA could choose not to do that (given that the 
alternative allows multiple possibilities for one of the operands), but 
the solution is to ensure that no alternative has more than one '0' 
constraint.

There are probably other patterns that can encounter the same issue, but 
I don't plan to fix them right now.

Andrew
diff mbox series

Patch

Fix conditional add LRA failure

Fix ICE in testcase gfortran.dg/assumed_rank_bounds_3.f90.

2020-01-31  Andrew Stubbs  <ams@codesourcery.com>

	gcc/
	* config/gcn/gcn-valu.md (addv64di3_exec): Allow one '0' in each
	alternative only.

diff --git a/gcc/config/gcn/gcn-valu.md b/gcc/config/gcn/gcn-valu.md
index 4aad835b2ef..ecdd60b8190 100644
--- a/gcc/config/gcn/gcn-valu.md
+++ b/gcc/config/gcn/gcn-valu.md
@@ -1200,13 +1200,14 @@ 
    (set_attr "length" "8")])
 
 (define_insn_and_split "addv64di3_exec"
-  [(set (match_operand:V64DI 0 "register_operand"		 "= &v,  &v")
+  [(set (match_operand:V64DI 0 "register_operand"	     "= &v,  &v, &v")
 	(vec_merge:V64DI
 	  (plus:V64DI
-	    (match_operand:V64DI 1 "register_operand"		 "%vDb,vDb0")
-	    (match_operand:V64DI 2 "gcn_alu_operand"		 "vDb0, vDb"))
-	  (match_operand:V64DI 3 "gcn_register_or_unspec_operand" " U0,  U0")
-	  (match_operand:DI 4 "gcn_exec_reg_operand"		 "   e,   e")))
+	    (match_operand:V64DI 1 "register_operand"	     "%vDb,vDb0,vDb")
+	    (match_operand:V64DI 2 "gcn_alu_operand"	     "vDb0, vDb,vDb"))
+	  (match_operand:V64DI 3 "gcn_register_or_unspec_operand"
+							     "   U,   U,  0")
+	  (match_operand:DI 4 "gcn_exec_reg_operand"	     "   e,   e,  e")))
    (clobber (reg:DI VCC_REG))]
   ""
   "#"