diff mbox series

[03/10,RISCV] Move iterators from sync.md to iterators.md

Message ID 1660860233-11175-4-git-send-email-apinski@marvell.com
State New
Headers show
Series Fix/improve the RISCV backend | expand

Commit Message

Li, Pan2 via Gcc-patches Aug. 18, 2022, 10:03 p.m. UTC
From: Andrew Pinski <apinski@marvell.com>

Like the previous two patches this moves the iterators
that are in sync.md to iterators.md.

OK? build and tested for riscv64-linux-gnu.

gcc/ChangeLog:

	* config/riscv/sync.md (any_atomic, atomic_optab): Move to ...
	* config/riscv/iterators.md: Here.
---
 gcc/config/riscv/iterators.md | 7 +++++++
 gcc/config/riscv/sync.md      | 4 ----
 2 files changed, 7 insertions(+), 4 deletions(-)
diff mbox series

Patch

diff --git a/gcc/config/riscv/iterators.md b/gcc/config/riscv/iterators.md
index 54590f43193..6c8a6d2dd59 100644
--- a/gcc/config/riscv/iterators.md
+++ b/gcc/config/riscv/iterators.md
@@ -151,6 +151,9 @@  (define_code_iterator any_ge [ge geu])
 (define_code_iterator any_lt [lt ltu])
 (define_code_iterator any_le [le leu])
 
+; atomics code iterator
+(define_code_iterator any_atomic [plus ior xor and])
+
 ; bitmanip code iterators
 (define_code_iterator bitmanip_bitwise [and ior])
 
@@ -205,6 +208,10 @@  (define_code_attr insn [(ashift "sll")
 			(plus "add")
 			(minus "sub")])
 
+; atomics code attribute
+(define_code_attr atomic_optab
+  [(plus "add") (ior "or") (xor "xor") (and "and")])
+
 ; bitmanip code attributes
 (define_code_attr bitmanip_optab [(smin "smin")
 				  (smax "smax")
diff --git a/gcc/config/riscv/sync.md b/gcc/config/riscv/sync.md
index 86b41e6b00a..7deb290d9dc 100644
--- a/gcc/config/riscv/sync.md
+++ b/gcc/config/riscv/sync.md
@@ -27,10 +27,6 @@  (define_c_enum "unspec" [
   UNSPEC_MEMORY_BARRIER
 ])
 
-(define_code_iterator any_atomic [plus ior xor and])
-(define_code_attr atomic_optab
-  [(plus "add") (ior "or") (xor "xor") (and "and")])
-
 ;; Memory barriers.
 
 (define_expand "mem_thread_fence"