From patchwork Tue Mar 23 14:32:46 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Christophe Lyon X-Patchwork-Id: 1457242 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=gcc.gnu.org (client-ip=2620:52:3:1:0:246e:9693:128c; helo=sourceware.org; envelope-from=gcc-patches-bounces@gcc.gnu.org; receiver=) Authentication-Results: ozlabs.org; dkim=pass (1024-bit key; unprotected) header.d=gcc.gnu.org header.i=@gcc.gnu.org header.a=rsa-sha256 header.s=default header.b=B0rRLnlR; dkim-atps=neutral Received: from sourceware.org (server2.sourceware.org [IPv6:2620:52:3:1:0:246e:9693:128c]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 4F4Ykj597Zz9sSC for ; Wed, 24 Mar 2021 01:33:17 +1100 (AEDT) Received: from server2.sourceware.org (localhost [IPv6:::1]) by sourceware.org (Postfix) with ESMTP id 5B6B3386180A; Tue, 23 Mar 2021 14:33:00 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org 5B6B3386180A DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gcc.gnu.org; s=default; t=1616509980; bh=IusWMt4g3K8aF0d+WkQMGKQqA9e+cc+zN4tfIP2V2fo=; h=To:Subject:Date:In-Reply-To:References:List-Id:List-Unsubscribe: List-Archive:List-Post:List-Help:List-Subscribe:From:Reply-To: From; b=B0rRLnlR3jG7SaQKKUyQ2+usR4YzZz5jsSVZlpAx3Bpn4EfVXT1vF7Bmi0MZS/k6m 387jaxHjVQZg29h7DDW/bI8l8WZEmHaacFXWvTwFDaFC3N33V5esUEJKY+OjNFnoIm 7PYQ3x+gcTFOefId38x/LNcAgQ0QBFD9Cjl84hto= X-Original-To: gcc-patches@gcc.gnu.org Delivered-To: gcc-patches@gcc.gnu.org Received: from mail-wm1-x335.google.com (mail-wm1-x335.google.com [IPv6:2a00:1450:4864:20::335]) by sourceware.org (Postfix) with ESMTPS id 67E6D385042B for ; Tue, 23 Mar 2021 14:32:57 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.3.2 sourceware.org 67E6D385042B Received: by mail-wm1-x335.google.com with SMTP id w203-20020a1c49d40000b029010c706d0642so1244043wma.0 for ; Tue, 23 Mar 2021 07:32:57 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:subject:date:message-id:in-reply-to :references; bh=IusWMt4g3K8aF0d+WkQMGKQqA9e+cc+zN4tfIP2V2fo=; b=mgXde/lXcDLI7PosIQbcSiEd5/ElyJO/ZFXFInayTWVfykGKsHsjW5x1Q/VkswbYDG j98/ZScFBsyu1lCDEIgHmXicK80+O4dTcgEIqWSQAVhJzvFJLRV5mpRMcAipPsfE31g2 6q3UAs7oMgKvU2EqkhmDfPU6fGAUnol8YvlLjiqPcjXl+ydi0iGfaFv6IkTHWdG9Ikh2 Q0F71ZiZ60N1i07PcOVAia/TQcZCbWc4X4ucRIlN5KDfaj43C+Br8ofDoHwYos+HpoSC QNb8s1iSh/Bu0IMEbnIyWZ4BDssbN1gr5bjEO8boCN9jrHkMTJuDoNJSPF/gD3AbsQIo drzw== X-Gm-Message-State: AOAM53186P8lK02LOQMlH91Y1A0/bTCRnePJW6wJ5HOtVg3+ZcDNc8vX y0SRPmhSZmTuhLgp9SXOLyGhpGjQM8x5k95N X-Google-Smtp-Source: ABdhPJyPY9Mo19oRRiNe874lvd+uc3iMpTLBvnC0ER+KF4Vof8IoYitUP6746DEFOlCU4gVnC32xOA== X-Received: by 2002:a05:600c:2053:: with SMTP id p19mr3639452wmg.87.1616509975581; Tue, 23 Mar 2021 07:32:55 -0700 (PDT) Received: from localhost.localdomain (static.42.136.251.148.clients.your-server.de. [148.251.136.42]) by smtp.gmail.com with ESMTPSA id h62sm3312102wmf.37.2021.03.23.07.32.54 for (version=TLS1_2 cipher=ECDHE-ECDSA-AES128-GCM-SHA256 bits=128/128); Tue, 23 Mar 2021 07:32:54 -0700 (PDT) To: gcc-patches@gcc.gnu.org Subject: [PATCH 4/8] testsuite/arm: Add arm_softfp_ok or arm_hard_ok as needed. Date: Tue, 23 Mar 2021 14:32:46 +0000 Message-Id: <1616509970-26398-5-git-send-email-christophe.lyon@linaro.org> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1616509970-26398-1-git-send-email-christophe.lyon@linaro.org> References: <1616509970-26398-1-git-send-email-christophe.lyon@linaro.org> X-Spam-Status: No, score=-14.8 required=5.0 tests=BAYES_00, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, DKIM_VALID_EF, GIT_PATCH_0, RCVD_IN_DNSWL_NONE, SPF_HELO_NONE, SPF_PASS, TXREP autolearn=ham autolearn_force=no version=3.4.2 X-Spam-Checker-Version: SpamAssassin 3.4.2 (2018-09-13) on server2.sourceware.org X-BeenThere: gcc-patches@gcc.gnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Gcc-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-Patchwork-Original-From: Christophe Lyon via Gcc-patches From: Christophe Lyon Reply-To: Christophe Lyon Errors-To: gcc-patches-bounces@gcc.gnu.org Sender: "Gcc-patches" Several tests override the -mfloat-abi option detected by their effective targets. Make sure it is supported, so that these tests are unsupported rather than failures (the inclusion of arm_neon.h otherwise fails for lack of gnu/stubs-*.h) This avoids failures with bfloat16_simd_2_1.c bfloat16_simd_3_1.c bf16_vldn_1.c bf16_vstn_1.c on arm-linux-gnueabi and pr51968.c bfloat16_simd_1_2.c bfloat16_simd_2_2.c bfloat16_simd_3_2.c on arm-linux-gnueabihf. On arm-eabi with default cpu/fpu/mode and a+rm multilibs, bfloat16_simd_2_1.c, bfloat16_simd_3_1.c, bf16_vstn_1.c and bf16_vldn_1.c become unsupported instead of pass because arm_hard_ok fails with "selected processor lacks an FPU". Since we also override the fpu in dg-additional-options, we'd need another effective target (say arm_hard_neon_ok) that would check -mfloat-abi=hard -mfpu=neon at the same time. But we have already so many arm effective targets, it doesn't seem like a good way forward. 2021-03-19 Christophe Lyon gcc/testsuite/ * gcc.target/arm/bfloat16_simd_1_2.c: Add arm_softfp_ok. * gcc.target/arm/bfloat16_simd_2_2.c: Likewise. * gcc.target/arm/bfloat16_simd_3_2.c: Likewise. * gcc.target/arm/pr51968.c: Likewise. * gcc.target/arm/bfloat16_simd_2_1.c: arm_hard_ok. * gcc.target/arm/bfloat16_simd_3_1.c: Likewise. * gcc.target/arm/simd/bf16_vldn_1.c: Likewise. * gcc.target/arm/simd/bf16_vstn_1.c: Likewise. --- gcc/testsuite/gcc.target/arm/bfloat16_simd_1_2.c | 1 + gcc/testsuite/gcc.target/arm/bfloat16_simd_2_1.c | 1 + gcc/testsuite/gcc.target/arm/bfloat16_simd_2_2.c | 1 + gcc/testsuite/gcc.target/arm/bfloat16_simd_3_1.c | 1 + gcc/testsuite/gcc.target/arm/bfloat16_simd_3_2.c | 1 + gcc/testsuite/gcc.target/arm/pr51968.c | 3 ++- gcc/testsuite/gcc.target/arm/simd/bf16_vldn_1.c | 1 + gcc/testsuite/gcc.target/arm/simd/bf16_vstn_1.c | 1 + 8 files changed, 9 insertions(+), 1 deletion(-) diff --git a/gcc/testsuite/gcc.target/arm/bfloat16_simd_1_2.c b/gcc/testsuite/gcc.target/arm/bfloat16_simd_1_2.c index 4ffcc54..95eecec 100644 --- a/gcc/testsuite/gcc.target/arm/bfloat16_simd_1_2.c +++ b/gcc/testsuite/gcc.target/arm/bfloat16_simd_1_2.c @@ -1,4 +1,5 @@ /* { dg-do assemble { target { arm*-*-* } } } */ +/* { dg-require-effective-target arm_softfp_ok } */ /* { dg-require-effective-target arm_v8_neon_ok } */ /* { dg-require-effective-target arm_v8_2a_bf16_neon_ok } */ /* { dg-additional-options "-march=armv8.2-a+bf16 -mfloat-abi=softfp -mfpu=auto" } */ diff --git a/gcc/testsuite/gcc.target/arm/bfloat16_simd_2_1.c b/gcc/testsuite/gcc.target/arm/bfloat16_simd_2_1.c index 05ee4d8..02b4c41 100644 --- a/gcc/testsuite/gcc.target/arm/bfloat16_simd_2_1.c +++ b/gcc/testsuite/gcc.target/arm/bfloat16_simd_2_1.c @@ -1,4 +1,5 @@ /* { dg-do assemble { target { arm*-*-* } } } */ +/* { dg-require-effective-target arm_hard_ok } */ /* { dg-require-effective-target arm_v8_neon_ok } */ /* { dg-require-effective-target arm_v8_2a_bf16_neon_ok } */ /* { dg-additional-options "-march=armv8.2-a -mfloat-abi=hard -mfpu=neon-fp-armv8" } */ diff --git a/gcc/testsuite/gcc.target/arm/bfloat16_simd_2_2.c b/gcc/testsuite/gcc.target/arm/bfloat16_simd_2_2.c index 15fba31..175bfa5 100644 --- a/gcc/testsuite/gcc.target/arm/bfloat16_simd_2_2.c +++ b/gcc/testsuite/gcc.target/arm/bfloat16_simd_2_2.c @@ -1,4 +1,5 @@ /* { dg-do assemble { target { arm*-*-* } } } */ +/* { dg-require-effective-target arm_softfp_ok } */ /* { dg-require-effective-target arm_v8_neon_ok } */ /* { dg-require-effective-target arm_v8_2a_bf16_neon_ok } */ /* { dg-additional-options "-march=armv8.2-a -mfloat-abi=softfp -mfpu=neon-fp-armv8" } */ diff --git a/gcc/testsuite/gcc.target/arm/bfloat16_simd_3_1.c b/gcc/testsuite/gcc.target/arm/bfloat16_simd_3_1.c index b9b7606..d2326c2 100644 --- a/gcc/testsuite/gcc.target/arm/bfloat16_simd_3_1.c +++ b/gcc/testsuite/gcc.target/arm/bfloat16_simd_3_1.c @@ -1,4 +1,5 @@ /* { dg-do assemble { target { arm*-*-* } } } */ +/* { dg-require-effective-target arm_hard_ok } */ /* { dg-require-effective-target arm_v8_neon_ok } */ /* { dg-require-effective-target arm_v8_2a_bf16_neon_ok } */ /* { dg-additional-options "-march=armv8.2-a -mfloat-abi=hard -mfpu=neon-fp-armv8" } */ diff --git a/gcc/testsuite/gcc.target/arm/bfloat16_simd_3_2.c b/gcc/testsuite/gcc.target/arm/bfloat16_simd_3_2.c index ab1fe10..346253b 100644 --- a/gcc/testsuite/gcc.target/arm/bfloat16_simd_3_2.c +++ b/gcc/testsuite/gcc.target/arm/bfloat16_simd_3_2.c @@ -1,4 +1,5 @@ /* { dg-do assemble { target { arm*-*-* } } } */ +/* { dg-require-effective-target arm_softfp_ok } */ /* { dg-require-effective-target arm_v8_neon_ok } */ /* { dg-require-effective-target arm_v8_2a_bf16_neon_ok } */ /* { dg-additional-options "-march=armv8.2-a -mfloat-abi=softfp -mfpu=neon-fp-armv8" } */ diff --git a/gcc/testsuite/gcc.target/arm/pr51968.c b/gcc/testsuite/gcc.target/arm/pr51968.c index 7814702..c06da48 100644 --- a/gcc/testsuite/gcc.target/arm/pr51968.c +++ b/gcc/testsuite/gcc.target/arm/pr51968.c @@ -1,7 +1,8 @@ /* PR target/51968 */ /* { dg-do compile } */ -/* { dg-options "-O2 -march=armv7-a -mfloat-abi=softfp -mfpu=neon" } */ +/* { dg-require-effective-target arm_softfp_ok } */ /* { dg-require-effective-target arm_neon_ok } */ +/* { dg-options "-O2 -march=armv7-a -mfloat-abi=softfp -mfpu=neon" } */ #include struct T { int8x8x2_t val; }; diff --git a/gcc/testsuite/gcc.target/arm/simd/bf16_vldn_1.c b/gcc/testsuite/gcc.target/arm/simd/bf16_vldn_1.c index 663e769..4d91614 100644 --- a/gcc/testsuite/gcc.target/arm/simd/bf16_vldn_1.c +++ b/gcc/testsuite/gcc.target/arm/simd/bf16_vldn_1.c @@ -1,4 +1,5 @@ /* { dg-do assemble } */ +/* { dg-require-effective-target arm_hard_ok } */ /* { dg-require-effective-target arm_v8_2a_bf16_neon_ok } */ /* { dg-add-options arm_v8_2a_bf16_neon } */ /* { dg-additional-options "-save-temps -O2 -mfloat-abi=hard" } */ diff --git a/gcc/testsuite/gcc.target/arm/simd/bf16_vstn_1.c b/gcc/testsuite/gcc.target/arm/simd/bf16_vstn_1.c index 2657b6f..5c6cdd5 100644 --- a/gcc/testsuite/gcc.target/arm/simd/bf16_vstn_1.c +++ b/gcc/testsuite/gcc.target/arm/simd/bf16_vstn_1.c @@ -1,4 +1,5 @@ /* { dg-do assemble } */ +/* { dg-require-effective-target arm_hard_ok } */ /* { dg-require-effective-target arm_v8_2a_bf16_neon_ok } */ /* { dg-add-options arm_v8_2a_bf16_neon } */ /* { dg-additional-options "-save-temps -O2 -mfloat-abi=hard" } */