| Message ID | 1616509970-26398-5-git-send-email-christophe.lyon@linaro.org |
|---|---|
| State | New |
| Headers | show |
| Series | testsuite/arm: Various cleanups | expand |
> -----Original Message----- > From: Gcc-patches <gcc-patches-bounces@gcc.gnu.org> On Behalf Of > Christophe Lyon via Gcc-patches > Sent: 23 March 2021 14:33 > To: gcc-patches@gcc.gnu.org > Subject: [PATCH 4/8] testsuite/arm: Add arm_softfp_ok or arm_hard_ok as > needed. > > Several tests override the -mfloat-abi option detected by their > effective targets. Make sure it is supported, so that these tests are > unsupported rather than failures (the inclusion of arm_neon.h > otherwise fails for lack of gnu/stubs-*.h) > > This avoids failures with > bfloat16_simd_2_1.c > bfloat16_simd_3_1.c > bf16_vldn_1.c > bf16_vstn_1.c on arm-linux-gnueabi > and > pr51968.c > bfloat16_simd_1_2.c > bfloat16_simd_2_2.c > bfloat16_simd_3_2.c on arm-linux-gnueabihf. > > On arm-eabi with default cpu/fpu/mode and a+rm multilibs, > bfloat16_simd_2_1.c, bfloat16_simd_3_1.c, bf16_vstn_1.c and > bf16_vldn_1.c become unsupported instead of pass because arm_hard_ok > fails with "selected processor lacks an FPU". Since we also override > the fpu in dg-additional-options, we'd need another effective target > (say arm_hard_neon_ok) that would check -mfloat-abi=hard -mfpu=neon at > the same time. But we have already so many arm effective targets, it > doesn't seem like a good way forward. Yeah, I think the approach you took is the best one for these tests. Ok. Thanks, Kyrill > > 2021-03-19 Christophe Lyon <christophe.lyon@linaro.org> > > gcc/testsuite/ > * gcc.target/arm/bfloat16_simd_1_2.c: Add arm_softfp_ok. > * gcc.target/arm/bfloat16_simd_2_2.c: Likewise. > * gcc.target/arm/bfloat16_simd_3_2.c: Likewise. > * gcc.target/arm/pr51968.c: Likewise. > * gcc.target/arm/bfloat16_simd_2_1.c: arm_hard_ok. > * gcc.target/arm/bfloat16_simd_3_1.c: Likewise. > * gcc.target/arm/simd/bf16_vldn_1.c: Likewise. > * gcc.target/arm/simd/bf16_vstn_1.c: Likewise. > --- > gcc/testsuite/gcc.target/arm/bfloat16_simd_1_2.c | 1 + > gcc/testsuite/gcc.target/arm/bfloat16_simd_2_1.c | 1 + > gcc/testsuite/gcc.target/arm/bfloat16_simd_2_2.c | 1 + > gcc/testsuite/gcc.target/arm/bfloat16_simd_3_1.c | 1 + > gcc/testsuite/gcc.target/arm/bfloat16_simd_3_2.c | 1 + > gcc/testsuite/gcc.target/arm/pr51968.c | 3 ++- > gcc/testsuite/gcc.target/arm/simd/bf16_vldn_1.c | 1 + > gcc/testsuite/gcc.target/arm/simd/bf16_vstn_1.c | 1 + > 8 files changed, 9 insertions(+), 1 deletion(-) > > diff --git a/gcc/testsuite/gcc.target/arm/bfloat16_simd_1_2.c > b/gcc/testsuite/gcc.target/arm/bfloat16_simd_1_2.c > index 4ffcc54..95eecec 100644 > --- a/gcc/testsuite/gcc.target/arm/bfloat16_simd_1_2.c > +++ b/gcc/testsuite/gcc.target/arm/bfloat16_simd_1_2.c > @@ -1,4 +1,5 @@ > /* { dg-do assemble { target { arm*-*-* } } } */ > +/* { dg-require-effective-target arm_softfp_ok } */ > /* { dg-require-effective-target arm_v8_neon_ok } */ > /* { dg-require-effective-target arm_v8_2a_bf16_neon_ok } */ > /* { dg-additional-options "-march=armv8.2-a+bf16 -mfloat-abi=softfp - > mfpu=auto" } */ > diff --git a/gcc/testsuite/gcc.target/arm/bfloat16_simd_2_1.c > b/gcc/testsuite/gcc.target/arm/bfloat16_simd_2_1.c > index 05ee4d8..02b4c41 100644 > --- a/gcc/testsuite/gcc.target/arm/bfloat16_simd_2_1.c > +++ b/gcc/testsuite/gcc.target/arm/bfloat16_simd_2_1.c > @@ -1,4 +1,5 @@ > /* { dg-do assemble { target { arm*-*-* } } } */ > +/* { dg-require-effective-target arm_hard_ok } */ > /* { dg-require-effective-target arm_v8_neon_ok } */ > /* { dg-require-effective-target arm_v8_2a_bf16_neon_ok } */ > /* { dg-additional-options "-march=armv8.2-a -mfloat-abi=hard - > mfpu=neon-fp-armv8" } */ > diff --git a/gcc/testsuite/gcc.target/arm/bfloat16_simd_2_2.c > b/gcc/testsuite/gcc.target/arm/bfloat16_simd_2_2.c > index 15fba31..175bfa5 100644 > --- a/gcc/testsuite/gcc.target/arm/bfloat16_simd_2_2.c > +++ b/gcc/testsuite/gcc.target/arm/bfloat16_simd_2_2.c > @@ -1,4 +1,5 @@ > /* { dg-do assemble { target { arm*-*-* } } } */ > +/* { dg-require-effective-target arm_softfp_ok } */ > /* { dg-require-effective-target arm_v8_neon_ok } */ > /* { dg-require-effective-target arm_v8_2a_bf16_neon_ok } */ > /* { dg-additional-options "-march=armv8.2-a -mfloat-abi=softfp - > mfpu=neon-fp-armv8" } */ > diff --git a/gcc/testsuite/gcc.target/arm/bfloat16_simd_3_1.c > b/gcc/testsuite/gcc.target/arm/bfloat16_simd_3_1.c > index b9b7606..d2326c2 100644 > --- a/gcc/testsuite/gcc.target/arm/bfloat16_simd_3_1.c > +++ b/gcc/testsuite/gcc.target/arm/bfloat16_simd_3_1.c > @@ -1,4 +1,5 @@ > /* { dg-do assemble { target { arm*-*-* } } } */ > +/* { dg-require-effective-target arm_hard_ok } */ > /* { dg-require-effective-target arm_v8_neon_ok } */ > /* { dg-require-effective-target arm_v8_2a_bf16_neon_ok } */ > /* { dg-additional-options "-march=armv8.2-a -mfloat-abi=hard - > mfpu=neon-fp-armv8" } */ > diff --git a/gcc/testsuite/gcc.target/arm/bfloat16_simd_3_2.c > b/gcc/testsuite/gcc.target/arm/bfloat16_simd_3_2.c > index ab1fe10..346253b 100644 > --- a/gcc/testsuite/gcc.target/arm/bfloat16_simd_3_2.c > +++ b/gcc/testsuite/gcc.target/arm/bfloat16_simd_3_2.c > @@ -1,4 +1,5 @@ > /* { dg-do assemble { target { arm*-*-* } } } */ > +/* { dg-require-effective-target arm_softfp_ok } */ > /* { dg-require-effective-target arm_v8_neon_ok } */ > /* { dg-require-effective-target arm_v8_2a_bf16_neon_ok } */ > /* { dg-additional-options "-march=armv8.2-a -mfloat-abi=softfp - > mfpu=neon-fp-armv8" } */ > diff --git a/gcc/testsuite/gcc.target/arm/pr51968.c > b/gcc/testsuite/gcc.target/arm/pr51968.c > index 7814702..c06da48 100644 > --- a/gcc/testsuite/gcc.target/arm/pr51968.c > +++ b/gcc/testsuite/gcc.target/arm/pr51968.c > @@ -1,7 +1,8 @@ > /* PR target/51968 */ > /* { dg-do compile } */ > -/* { dg-options "-O2 -march=armv7-a -mfloat-abi=softfp -mfpu=neon" } */ > +/* { dg-require-effective-target arm_softfp_ok } */ > /* { dg-require-effective-target arm_neon_ok } */ > +/* { dg-options "-O2 -march=armv7-a -mfloat-abi=softfp -mfpu=neon" } */ > #include <arm_neon.h> > > struct T { int8x8x2_t val; }; > diff --git a/gcc/testsuite/gcc.target/arm/simd/bf16_vldn_1.c > b/gcc/testsuite/gcc.target/arm/simd/bf16_vldn_1.c > index 663e769..4d91614 100644 > --- a/gcc/testsuite/gcc.target/arm/simd/bf16_vldn_1.c > +++ b/gcc/testsuite/gcc.target/arm/simd/bf16_vldn_1.c > @@ -1,4 +1,5 @@ > /* { dg-do assemble } */ > +/* { dg-require-effective-target arm_hard_ok } */ > /* { dg-require-effective-target arm_v8_2a_bf16_neon_ok } */ > /* { dg-add-options arm_v8_2a_bf16_neon } */ > /* { dg-additional-options "-save-temps -O2 -mfloat-abi=hard" } */ > diff --git a/gcc/testsuite/gcc.target/arm/simd/bf16_vstn_1.c > b/gcc/testsuite/gcc.target/arm/simd/bf16_vstn_1.c > index 2657b6f..5c6cdd5 100644 > --- a/gcc/testsuite/gcc.target/arm/simd/bf16_vstn_1.c > +++ b/gcc/testsuite/gcc.target/arm/simd/bf16_vstn_1.c > @@ -1,4 +1,5 @@ > /* { dg-do assemble } */ > +/* { dg-require-effective-target arm_hard_ok } */ > /* { dg-require-effective-target arm_v8_2a_bf16_neon_ok } */ > /* { dg-add-options arm_v8_2a_bf16_neon } */ > /* { dg-additional-options "-save-temps -O2 -mfloat-abi=hard" } */ > -- > 2.7.4
diff --git a/gcc/testsuite/gcc.target/arm/bfloat16_simd_1_2.c b/gcc/testsuite/gcc.target/arm/bfloat16_simd_1_2.c index 4ffcc54..95eecec 100644 --- a/gcc/testsuite/gcc.target/arm/bfloat16_simd_1_2.c +++ b/gcc/testsuite/gcc.target/arm/bfloat16_simd_1_2.c @@ -1,4 +1,5 @@ /* { dg-do assemble { target { arm*-*-* } } } */ +/* { dg-require-effective-target arm_softfp_ok } */ /* { dg-require-effective-target arm_v8_neon_ok } */ /* { dg-require-effective-target arm_v8_2a_bf16_neon_ok } */ /* { dg-additional-options "-march=armv8.2-a+bf16 -mfloat-abi=softfp -mfpu=auto" } */ diff --git a/gcc/testsuite/gcc.target/arm/bfloat16_simd_2_1.c b/gcc/testsuite/gcc.target/arm/bfloat16_simd_2_1.c index 05ee4d8..02b4c41 100644 --- a/gcc/testsuite/gcc.target/arm/bfloat16_simd_2_1.c +++ b/gcc/testsuite/gcc.target/arm/bfloat16_simd_2_1.c @@ -1,4 +1,5 @@ /* { dg-do assemble { target { arm*-*-* } } } */ +/* { dg-require-effective-target arm_hard_ok } */ /* { dg-require-effective-target arm_v8_neon_ok } */ /* { dg-require-effective-target arm_v8_2a_bf16_neon_ok } */ /* { dg-additional-options "-march=armv8.2-a -mfloat-abi=hard -mfpu=neon-fp-armv8" } */ diff --git a/gcc/testsuite/gcc.target/arm/bfloat16_simd_2_2.c b/gcc/testsuite/gcc.target/arm/bfloat16_simd_2_2.c index 15fba31..175bfa5 100644 --- a/gcc/testsuite/gcc.target/arm/bfloat16_simd_2_2.c +++ b/gcc/testsuite/gcc.target/arm/bfloat16_simd_2_2.c @@ -1,4 +1,5 @@ /* { dg-do assemble { target { arm*-*-* } } } */ +/* { dg-require-effective-target arm_softfp_ok } */ /* { dg-require-effective-target arm_v8_neon_ok } */ /* { dg-require-effective-target arm_v8_2a_bf16_neon_ok } */ /* { dg-additional-options "-march=armv8.2-a -mfloat-abi=softfp -mfpu=neon-fp-armv8" } */ diff --git a/gcc/testsuite/gcc.target/arm/bfloat16_simd_3_1.c b/gcc/testsuite/gcc.target/arm/bfloat16_simd_3_1.c index b9b7606..d2326c2 100644 --- a/gcc/testsuite/gcc.target/arm/bfloat16_simd_3_1.c +++ b/gcc/testsuite/gcc.target/arm/bfloat16_simd_3_1.c @@ -1,4 +1,5 @@ /* { dg-do assemble { target { arm*-*-* } } } */ +/* { dg-require-effective-target arm_hard_ok } */ /* { dg-require-effective-target arm_v8_neon_ok } */ /* { dg-require-effective-target arm_v8_2a_bf16_neon_ok } */ /* { dg-additional-options "-march=armv8.2-a -mfloat-abi=hard -mfpu=neon-fp-armv8" } */ diff --git a/gcc/testsuite/gcc.target/arm/bfloat16_simd_3_2.c b/gcc/testsuite/gcc.target/arm/bfloat16_simd_3_2.c index ab1fe10..346253b 100644 --- a/gcc/testsuite/gcc.target/arm/bfloat16_simd_3_2.c +++ b/gcc/testsuite/gcc.target/arm/bfloat16_simd_3_2.c @@ -1,4 +1,5 @@ /* { dg-do assemble { target { arm*-*-* } } } */ +/* { dg-require-effective-target arm_softfp_ok } */ /* { dg-require-effective-target arm_v8_neon_ok } */ /* { dg-require-effective-target arm_v8_2a_bf16_neon_ok } */ /* { dg-additional-options "-march=armv8.2-a -mfloat-abi=softfp -mfpu=neon-fp-armv8" } */ diff --git a/gcc/testsuite/gcc.target/arm/pr51968.c b/gcc/testsuite/gcc.target/arm/pr51968.c index 7814702..c06da48 100644 --- a/gcc/testsuite/gcc.target/arm/pr51968.c +++ b/gcc/testsuite/gcc.target/arm/pr51968.c @@ -1,7 +1,8 @@ /* PR target/51968 */ /* { dg-do compile } */ -/* { dg-options "-O2 -march=armv7-a -mfloat-abi=softfp -mfpu=neon" } */ +/* { dg-require-effective-target arm_softfp_ok } */ /* { dg-require-effective-target arm_neon_ok } */ +/* { dg-options "-O2 -march=armv7-a -mfloat-abi=softfp -mfpu=neon" } */ #include <arm_neon.h> struct T { int8x8x2_t val; }; diff --git a/gcc/testsuite/gcc.target/arm/simd/bf16_vldn_1.c b/gcc/testsuite/gcc.target/arm/simd/bf16_vldn_1.c index 663e769..4d91614 100644 --- a/gcc/testsuite/gcc.target/arm/simd/bf16_vldn_1.c +++ b/gcc/testsuite/gcc.target/arm/simd/bf16_vldn_1.c @@ -1,4 +1,5 @@ /* { dg-do assemble } */ +/* { dg-require-effective-target arm_hard_ok } */ /* { dg-require-effective-target arm_v8_2a_bf16_neon_ok } */ /* { dg-add-options arm_v8_2a_bf16_neon } */ /* { dg-additional-options "-save-temps -O2 -mfloat-abi=hard" } */ diff --git a/gcc/testsuite/gcc.target/arm/simd/bf16_vstn_1.c b/gcc/testsuite/gcc.target/arm/simd/bf16_vstn_1.c index 2657b6f..5c6cdd5 100644 --- a/gcc/testsuite/gcc.target/arm/simd/bf16_vstn_1.c +++ b/gcc/testsuite/gcc.target/arm/simd/bf16_vstn_1.c @@ -1,4 +1,5 @@ /* { dg-do assemble } */ +/* { dg-require-effective-target arm_hard_ok } */ /* { dg-require-effective-target arm_v8_2a_bf16_neon_ok } */ /* { dg-add-options arm_v8_2a_bf16_neon } */ /* { dg-additional-options "-save-temps -O2 -mfloat-abi=hard" } */