| Message ID | 1607704365-16196-1-git-send-email-christophe.lyon@linaro.org |
|---|---|
| State | New |
| Headers | show |
| Series | arm: Auto-vectorization for MVE clean condition for vand and vorr expanders | expand |
> -----Original Message----- > From: Gcc-patches <gcc-patches-bounces@gcc.gnu.org> On Behalf Of > Christophe Lyon via Gcc-patches > Sent: 11 December 2020 16:33 > To: gcc-patches@gcc.gnu.org > Subject: [PATCH] arm: Auto-vectorization for MVE clean condition for vand > and vorr expanders > > The patch restores the unconditional definition of the VDQ iterator, > and changes the conditions of the vand and vorr expanders to use > ARM_HAVE_<MODE>_ARITH. Nice, thanks. Will you adjust the rest of your autovectorisation series to be consistent with this? Thanks again for working on this. Kyrill > > 2020-12-11 Christophe Lyon <christophe.lyon@linaro.org> > > gcc/ > * config/arm/iterators.md (VDQ): Remove TARGET_HAVE_MVE > conditions. > * config/arm/vec-common.md (and<mode>3): Use > ARM_HAVE_<MODE>_ARITH. > (ior<mode>3): Likewise. > --- > gcc/config/arm/iterators.md | 7 +------ > gcc/config/arm/vec-common.md | 6 ++---- > 2 files changed, 3 insertions(+), 10 deletions(-) > > diff --git a/gcc/config/arm/iterators.md b/gcc/config/arm/iterators.md > index 9c4911d..bbe2312 100644 > --- a/gcc/config/arm/iterators.md > +++ b/gcc/config/arm/iterators.md > @@ -147,12 +147,7 @@ (define_mode_iterator VW [V8QI V4HI V2SI]) > (define_mode_iterator VN [V8HI V4SI V2DI]) > > ;; All supported vector modes (except singleton DImode). > -(define_mode_iterator VDQ [(V8QI "!TARGET_HAVE_MVE") V16QI > - (V4HI "!TARGET_HAVE_MVE") V8HI > - (V2SI "!TARGET_HAVE_MVE") V4SI > - (V4HF "!TARGET_HAVE_MVE") V8HF > - (V2SF "!TARGET_HAVE_MVE") V4SF > - (V2DI "!TARGET_HAVE_MVE")]) > +(define_mode_iterator VDQ [V8QI V16QI V4HI V8HI V2SI V4SI V4HF V8HF > V2SF V4SF V2DI]) > > ;; All supported floating-point vector modes (except V2DF). > (define_mode_iterator VF [(V4HF "TARGET_NEON_FP16INST") > diff --git a/gcc/config/arm/vec-common.md b/gcc/config/arm/vec- > common.md > index 5b4c95d..5142cc0 100644 > --- a/gcc/config/arm/vec-common.md > +++ b/gcc/config/arm/vec-common.md > @@ -177,16 +177,14 @@ (define_expand "and<mode>3" > [(set (match_operand:VDQ 0 "s_register_operand" "") > (and:VDQ (match_operand:VDQ 1 "s_register_operand" "") > (match_operand:VDQ 2 "neon_inv_logic_op2" "")))] > - "TARGET_NEON > - || TARGET_HAVE_MVE" > + "ARM_HAVE_<MODE>_ARITH" > ) > > (define_expand "ior<mode>3" > [(set (match_operand:VDQ 0 "s_register_operand" "") > (ior:VDQ (match_operand:VDQ 1 "s_register_operand" "") > (match_operand:VDQ 2 "neon_logic_op2" "")))] > - "TARGET_NEON > - || TARGET_HAVE_MVE" > + "ARM_HAVE_<MODE>_ARITH" > ) > > (define_expand "xor<mode>3" > -- > 2.7.4
On Fri, 11 Dec 2020 at 17:35, Kyrylo Tkachov <Kyrylo.Tkachov@arm.com> wrote: > > > > > -----Original Message----- > > From: Gcc-patches <gcc-patches-bounces@gcc.gnu.org> On Behalf Of > > Christophe Lyon via Gcc-patches > > Sent: 11 December 2020 16:33 > > To: gcc-patches@gcc.gnu.org > > Subject: [PATCH] arm: Auto-vectorization for MVE clean condition for vand > > and vorr expanders > > > > The patch restores the unconditional definition of the VDQ iterator, > > and changes the conditions of the vand and vorr expanders to use > > ARM_HAVE_<MODE>_ARITH. > > Nice, thanks. > Will you adjust the rest of your autovectorisation series to be consistent with this? > Yes that's the plan, I just wanted to move this before the rest of the series. So yes, I'll have to send an updated version of the other patches. Thanks! > Thanks again for working on this. > Kyrill > > > > > 2020-12-11 Christophe Lyon <christophe.lyon@linaro.org> > > > > gcc/ > > * config/arm/iterators.md (VDQ): Remove TARGET_HAVE_MVE > > conditions. > > * config/arm/vec-common.md (and<mode>3): Use > > ARM_HAVE_<MODE>_ARITH. > > (ior<mode>3): Likewise. > > --- > > gcc/config/arm/iterators.md | 7 +------ > > gcc/config/arm/vec-common.md | 6 ++---- > > 2 files changed, 3 insertions(+), 10 deletions(-) > > > > diff --git a/gcc/config/arm/iterators.md b/gcc/config/arm/iterators.md > > index 9c4911d..bbe2312 100644 > > --- a/gcc/config/arm/iterators.md > > +++ b/gcc/config/arm/iterators.md > > @@ -147,12 +147,7 @@ (define_mode_iterator VW [V8QI V4HI V2SI]) > > (define_mode_iterator VN [V8HI V4SI V2DI]) > > > > ;; All supported vector modes (except singleton DImode). > > -(define_mode_iterator VDQ [(V8QI "!TARGET_HAVE_MVE") V16QI > > - (V4HI "!TARGET_HAVE_MVE") V8HI > > - (V2SI "!TARGET_HAVE_MVE") V4SI > > - (V4HF "!TARGET_HAVE_MVE") V8HF > > - (V2SF "!TARGET_HAVE_MVE") V4SF > > - (V2DI "!TARGET_HAVE_MVE")]) > > +(define_mode_iterator VDQ [V8QI V16QI V4HI V8HI V2SI V4SI V4HF V8HF > > V2SF V4SF V2DI]) > > > > ;; All supported floating-point vector modes (except V2DF). > > (define_mode_iterator VF [(V4HF "TARGET_NEON_FP16INST") > > diff --git a/gcc/config/arm/vec-common.md b/gcc/config/arm/vec- > > common.md > > index 5b4c95d..5142cc0 100644 > > --- a/gcc/config/arm/vec-common.md > > +++ b/gcc/config/arm/vec-common.md > > @@ -177,16 +177,14 @@ (define_expand "and<mode>3" > > [(set (match_operand:VDQ 0 "s_register_operand" "") > > (and:VDQ (match_operand:VDQ 1 "s_register_operand" "") > > (match_operand:VDQ 2 "neon_inv_logic_op2" "")))] > > - "TARGET_NEON > > - || TARGET_HAVE_MVE" > > + "ARM_HAVE_<MODE>_ARITH" > > ) > > > > (define_expand "ior<mode>3" > > [(set (match_operand:VDQ 0 "s_register_operand" "") > > (ior:VDQ (match_operand:VDQ 1 "s_register_operand" "") > > (match_operand:VDQ 2 "neon_logic_op2" "")))] > > - "TARGET_NEON > > - || TARGET_HAVE_MVE" > > + "ARM_HAVE_<MODE>_ARITH" > > ) > > > > (define_expand "xor<mode>3" > > -- > > 2.7.4 >
diff --git a/gcc/config/arm/iterators.md b/gcc/config/arm/iterators.md index 9c4911d..bbe2312 100644 --- a/gcc/config/arm/iterators.md +++ b/gcc/config/arm/iterators.md @@ -147,12 +147,7 @@ (define_mode_iterator VW [V8QI V4HI V2SI]) (define_mode_iterator VN [V8HI V4SI V2DI]) ;; All supported vector modes (except singleton DImode). -(define_mode_iterator VDQ [(V8QI "!TARGET_HAVE_MVE") V16QI - (V4HI "!TARGET_HAVE_MVE") V8HI - (V2SI "!TARGET_HAVE_MVE") V4SI - (V4HF "!TARGET_HAVE_MVE") V8HF - (V2SF "!TARGET_HAVE_MVE") V4SF - (V2DI "!TARGET_HAVE_MVE")]) +(define_mode_iterator VDQ [V8QI V16QI V4HI V8HI V2SI V4SI V4HF V8HF V2SF V4SF V2DI]) ;; All supported floating-point vector modes (except V2DF). (define_mode_iterator VF [(V4HF "TARGET_NEON_FP16INST") diff --git a/gcc/config/arm/vec-common.md b/gcc/config/arm/vec-common.md index 5b4c95d..5142cc0 100644 --- a/gcc/config/arm/vec-common.md +++ b/gcc/config/arm/vec-common.md @@ -177,16 +177,14 @@ (define_expand "and<mode>3" [(set (match_operand:VDQ 0 "s_register_operand" "") (and:VDQ (match_operand:VDQ 1 "s_register_operand" "") (match_operand:VDQ 2 "neon_inv_logic_op2" "")))] - "TARGET_NEON - || TARGET_HAVE_MVE" + "ARM_HAVE_<MODE>_ARITH" ) (define_expand "ior<mode>3" [(set (match_operand:VDQ 0 "s_register_operand" "") (ior:VDQ (match_operand:VDQ 1 "s_register_operand" "") (match_operand:VDQ 2 "neon_logic_op2" "")))] - "TARGET_NEON - || TARGET_HAVE_MVE" + "ARM_HAVE_<MODE>_ARITH" ) (define_expand "xor<mode>3"