| Message ID | 1601891882-13015-1-git-send-email-christophe.lyon@linaro.org |
|---|---|
| State | New |
| Headers | show |
| Series | arm: [MVE] Add missing __arm_vcvtnq_u32_f32 intrinsic (PR 96914) | expand |
> -----Original Message----- > From: Gcc-patches <gcc-patches-bounces@gcc.gnu.org> On Behalf Of > Christophe Lyon via Gcc-patches > Sent: 05 October 2020 10:58 > To: gcc-patches@gcc.gnu.org > Subject: [PATCH] arm: [MVE] Add missing __arm_vcvtnq_u32_f32 intrinsic > (PR 96914) > > __arm_vcvtnq_u32_f32 was missing from arm_mve.h, although the s32_f32 > and > [su]16_f16 versions were present. > > This patch adds the missing version and testcase, which are > cut-and-paste from the other versions. Ok. Thanks, Kyrill > > 2020-10-05 Christophe Lyon <christophe.lyon@linaro.org> > > gcc/ > * config/arm/arm_mve.h (__arm_vcvtnq_u32_f32): New. > > gcc/testsuite/ > * gcc.target/arm/mve/intrinsics/vcvtnq_u32_f32.c: New test. > --- > gcc/config/arm/arm_mve.h | 8 ++++++++ > .../gcc.target/arm/mve/intrinsics/vcvtnq_u32_f32.c | 13 > +++++++++++++ > 2 files changed, 21 insertions(+) > create mode 100644 > gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtnq_u32_f32.c > > diff --git a/gcc/config/arm/arm_mve.h b/gcc/config/arm/arm_mve.h > index 99cff41..ecff3d1 100644 > --- a/gcc/config/arm/arm_mve.h > +++ b/gcc/config/arm/arm_mve.h > @@ -643,6 +643,7 @@ > #define vcvtpq_u16_f16(__a) __arm_vcvtpq_u16_f16(__a) > #define vcvtpq_u32_f32(__a) __arm_vcvtpq_u32_f32(__a) > #define vcvtnq_u16_f16(__a) __arm_vcvtnq_u16_f16(__a) > +#define vcvtnq_u32_f32(__a) __arm_vcvtnq_u32_f32(__a) > #define vcvtmq_u16_f16(__a) __arm_vcvtmq_u16_f16(__a) > #define vcvtmq_u32_f32(__a) __arm_vcvtmq_u32_f32(__a) > #define vcvtaq_u16_f16(__a) __arm_vcvtaq_u16_f16(__a) > @@ -17012,6 +17013,13 @@ __arm_vcvtnq_u16_f16 (float16x8_t __a) > return __builtin_mve_vcvtnq_uv8hi (__a); > } > > +__extension__ extern __inline uint32x4_t > +__attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) > +__arm_vcvtnq_u32_f32 (float32x4_t __a) > +{ > + return __builtin_mve_vcvtnq_uv4si (__a); > +} > + > __extension__ extern __inline uint16x8_t > __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) > __arm_vcvtmq_u16_f16 (float16x8_t __a) > diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtnq_u32_f32.c > b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtnq_u32_f32.c > new file mode 100644 > index 0000000..b6d5eb9 > --- /dev/null > +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtnq_u32_f32.c > @@ -0,0 +1,13 @@ > +/* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ > +/* { dg-add-options arm_v8_1m_mve_fp } */ > +/* { dg-additional-options "-O2" } */ > + > +#include "arm_mve.h" > + > +uint32x4_t > +foo (float32x4_t a) > +{ > + return vcvtnq_u32_f32 (a); > +} > + > +/* { dg-final { scan-assembler "vcvtn.u32.f32" } } */ > -- > 2.7.4
diff --git a/gcc/config/arm/arm_mve.h b/gcc/config/arm/arm_mve.h index 99cff41..ecff3d1 100644 --- a/gcc/config/arm/arm_mve.h +++ b/gcc/config/arm/arm_mve.h @@ -643,6 +643,7 @@ #define vcvtpq_u16_f16(__a) __arm_vcvtpq_u16_f16(__a) #define vcvtpq_u32_f32(__a) __arm_vcvtpq_u32_f32(__a) #define vcvtnq_u16_f16(__a) __arm_vcvtnq_u16_f16(__a) +#define vcvtnq_u32_f32(__a) __arm_vcvtnq_u32_f32(__a) #define vcvtmq_u16_f16(__a) __arm_vcvtmq_u16_f16(__a) #define vcvtmq_u32_f32(__a) __arm_vcvtmq_u32_f32(__a) #define vcvtaq_u16_f16(__a) __arm_vcvtaq_u16_f16(__a) @@ -17012,6 +17013,13 @@ __arm_vcvtnq_u16_f16 (float16x8_t __a) return __builtin_mve_vcvtnq_uv8hi (__a); } +__extension__ extern __inline uint32x4_t +__attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) +__arm_vcvtnq_u32_f32 (float32x4_t __a) +{ + return __builtin_mve_vcvtnq_uv4si (__a); +} + __extension__ extern __inline uint16x8_t __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) __arm_vcvtmq_u16_f16 (float16x8_t __a) diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtnq_u32_f32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtnq_u32_f32.c new file mode 100644 index 0000000..b6d5eb9 --- /dev/null +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtnq_u32_f32.c @@ -0,0 +1,13 @@ +/* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ +/* { dg-add-options arm_v8_1m_mve_fp } */ +/* { dg-additional-options "-O2" } */ + +#include "arm_mve.h" + +uint32x4_t +foo (float32x4_t a) +{ + return vcvtnq_u32_f32 (a); +} + +/* { dg-final { scan-assembler "vcvtn.u32.f32" } } */