@@ -5525,6 +5525,8 @@ const struct altivec_builtin_types altivec_overloaded_builtins[] = {
{ P9V_BUILTIN_VEC_REVB, P9V_BUILTIN_XXBRQ_V16QI,
RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, 0, 0 },
{ P9V_BUILTIN_VEC_REVB, P9V_BUILTIN_XXBRQ_V16QI,
+ RS6000_BTI_bool_V16QI, RS6000_BTI_bool_V16QI, 0, 0 },
+ { P9V_BUILTIN_VEC_REVB, P9V_BUILTIN_XXBRQ_V16QI,
RS6000_BTI_V16QI, RS6000_BTI_V16QI, 0, 0 },
{ P9V_BUILTIN_VEC_REVB, P9V_BUILTIN_XXBRQ_V1TI,
RS6000_BTI_unsigned_V1TI, RS6000_BTI_unsigned_V1TI, 0, 0 },
@@ -5537,12 +5539,16 @@ const struct altivec_builtin_types altivec_overloaded_builtins[] = {
{ P9V_BUILTIN_VEC_REVB, P9V_BUILTIN_XXBRD_V2DF,
RS6000_BTI_V2DF, RS6000_BTI_V2DF, 0, 0 },
{ P9V_BUILTIN_VEC_REVB, P9V_BUILTIN_XXBRW_V4SI,
+ RS6000_BTI_bool_V4SI, RS6000_BTI_bool_V4SI, 0, 0 },
+ { P9V_BUILTIN_VEC_REVB, P9V_BUILTIN_XXBRW_V4SI,
RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, 0, 0 },
{ P9V_BUILTIN_VEC_REVB, P9V_BUILTIN_XXBRW_V4SI,
RS6000_BTI_V4SI, RS6000_BTI_V4SI, 0, 0 },
{ P9V_BUILTIN_VEC_REVB, P9V_BUILTIN_XXBRW_V4SF,
RS6000_BTI_V4SF, RS6000_BTI_V4SF, 0, 0 },
{ P9V_BUILTIN_VEC_REVB, P9V_BUILTIN_XXBRH_V8HI,
+ RS6000_BTI_bool_V8HI, RS6000_BTI_bool_V8HI, 0, 0 },
+ { P9V_BUILTIN_VEC_REVB, P9V_BUILTIN_XXBRH_V8HI,
RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, 0, 0 },
{ P9V_BUILTIN_VEC_REVB, P9V_BUILTIN_XXBRH_V8HI,
RS6000_BTI_V8HI, RS6000_BTI_V8HI, 0, 0 },
@@ -18483,13 +18483,17 @@ of each element.
If the ISA 3.0 instruction set additions (@option{-mcpu=power9})
are available:
@smallexample
+vector signed bool char vec_revb (vector signed char);
vector signed char vec_revb (vector signed char);
vector unsigned char vec_revb (vector unsigned char);
+vector bool short vec_revb (vector bool short);
vector short vec_revb (vector short);
vector unsigned short vec_revb (vector unsigned short);
+vector bool int vec_revb (vector bool int);
vector int vec_revb (vector int);
vector unsigned int vec_revb (vector unsigned int);
vector float vec_revb (vector float);
+vector bool long long vec_revb (vector bool long long);
vector long long vec_revb (vector long long);
vector unsigned long long vec_revb (vector unsigned long long);
vector double vec_revb (vector double);
@@ -13,6 +13,12 @@ rev_char (vector char a)
return vec_revb (a); /* XXBRQ. */
}
+vector bool char
+rev_bool_char (vector bool char a)
+{
+ return vec_revb (a); /* XXBRQ. */
+}
+
vector signed char
rev_schar (vector signed char a)
{
@@ -31,6 +37,12 @@ rev_short (vector short a)
return vec_revb (a); /* XXBRH. */
}
+vector bool short
+rev_bool_short (vector bool short a)
+{
+ return vec_revb (a); /* XXBRH. */
+}
+
vector unsigned short
rev_ushort (vector unsigned short a)
{
@@ -43,6 +55,12 @@ rev_int (vector int a)
return vec_revb (a); /* XXBRW. */
}
+vector bool int
+rev_bool_int (vector bool int a)
+{
+ return vec_revb (a); /* XXBRW. */
+}
+
vector unsigned int
rev_uint (vector unsigned int a)
{
@@ -62,6 +80,6 @@ rev_double (vector double a)
}
/* { dg-final { scan-assembler-times "xxbrd" 1 } } */
-/* { dg-final { scan-assembler-times "xxbrh" 2 } } */
-/* { dg-final { scan-assembler-times "xxbrq" 3 } } */
-/* { dg-final { scan-assembler-times "xxbrw" 3 } } */
+/* { dg-final { scan-assembler-times "xxbrh" 3 } } */
+/* { dg-final { scan-assembler-times "xxbrq" 4 } } */
+/* { dg-final { scan-assembler-times "xxbrw" 4 } } */
@@ -20,6 +20,18 @@ rev_ulong (vector unsigned long a)
return vec_revb (a); /* XXBRD. */
}
+vector long long
+rev_long_long (vector long long a)
+{
+ return vec_revb (a); /* XXBRD. */
+}
+
+vector unsigned long long
+rev_ulong_ulong (vector unsigned long long a)
+{
+ return vec_revb (a); /* XXBRD. */
+}
+
vector __int128_t
rev_int128 (vector __int128_t a)
{
@@ -32,5 +44,5 @@ rev_uint128 (vector __uint128_t a)
return vec_revb (a); /* XXBRQ. */
}
-/* { dg-final { scan-assembler-times "xxbrd" 2 } } */
+/* { dg-final { scan-assembler-times "xxbrd" 4 } } */
/* { dg-final { scan-assembler-times "xxbrq" 2 } } */
GCC Maintainers: The following patch adds support for the some additional vec_revb builtin functions. It also adds a missing testcase. The patch has been tested on powerpc64le-unknown-linux-gnu (Power 8 LE), powerpc64-unknown-linux-gnu (Power 8 BE), powerpc64-unknown-linux-gnu (Power 7). Please let me know if the following patch is acceptable. Thanks. Carl Love ---------------------------------------------------- gcc/ChangeLog: 2017-07-11 Carl Love <cel@us.ibm.com> * config/rs6000/rs6000-c.c: Add support for built-in functions vector bool char vec_revb (vector bool char); vector bool short vec_revb (vector short char); vector bool int vec_revb (vector bool int); vector bool long long vec_revb (vector bool long long); * doc/extend.texi: Update the built-in documentation file for the new built-in functions. gcc/testsuite/ChangeLog: 2017-07-11 Carl Love <cel@us.ibm.com> * gcc.target/powerpc/p9-xxbr-1.c (rev_bool_char, rev_bool_short, rev_bool_int): Add test cases for builtins. * gcc.target/powerpc/p9-xxbr-2.c (rev_long_long, rev_ulong_ulong): Add test cases for builtins. --- gcc/config/rs6000/rs6000-c.c | 6 ++++++ gcc/doc/extend.texi | 4 ++++ gcc/testsuite/gcc.target/powerpc/p9-xxbr-1.c | 24 +++++++++++++++++++++--- gcc/testsuite/gcc.target/powerpc/p9-xxbr-2.c | 14 +++++++++++++- 4 files changed, 44 insertions(+), 4 deletions(-)