| Message ID | 1497966651-23374-1-git-send-email-james.greenhalgh@arm.com |
|---|---|
| State | New |
| Headers | show |
On 20/06/17 14:50, James Greenhalgh wrote: > > Hi, > > While GCC doesn't need to know anything about the RcPc extension for code > generation, we do need to add the extension flag to the string we pass > to the assembler when we're compiling for a CPU which implements the RcPc > extension. > > I've built a toolchain with this patch applied, and checked that we > correctly pass +rcpc on to the assembler if we give something like > -mcpu=generic+rcpc . > > OK? > > Thanks, > James > OK. R. > --- > 2017-06-20 James Greenhalgh <james.greenhalgh@arm.com> > > * config/aarch64/aarch64-option-extensions.def (rcpc): New. > * config/aarch64/aarch64.h (AARCH64_FL_RCPC): New. > > > 0001-Patch-AArch64-Add-rcpc-extension.patch > > > diff --git a/gcc/config/aarch64/aarch64-option-extensions.def b/gcc/config/aarch64/aarch64-option-extensions.def > index b54de03..c0752ce 100644 > --- a/gcc/config/aarch64/aarch64-option-extensions.def > +++ b/gcc/config/aarch64/aarch64-option-extensions.def > @@ -60,4 +60,7 @@ AARCH64_OPT_EXTENSION("lse", AARCH64_FL_LSE, 0, 0, "atomics") > Disabling "fp16" just disables "fp16". */ > AARCH64_OPT_EXTENSION("fp16", AARCH64_FL_F16, AARCH64_FL_FP, 0, "fphp asimdhp") > > +/* Enabling or disabling "rcpc" only changes "rcpc". */ > +AARCH64_OPT_EXTENSION("rcpc", AARCH64_FL_RCPC, 0, 0, "lrcpc") > + > #undef AARCH64_OPT_EXTENSION > diff --git a/gcc/config/aarch64/aarch64.h b/gcc/config/aarch64/aarch64.h > index e4fb96f..3b3f27e 100644 > --- a/gcc/config/aarch64/aarch64.h > +++ b/gcc/config/aarch64/aarch64.h > @@ -140,6 +140,7 @@ extern unsigned aarch64_architecture_version; > #define AARCH64_FL_F16 (1 << 9) /* Has ARMv8.2-A FP16 extensions. */ > /* ARMv8.3-A architecture extensions. */ > #define AARCH64_FL_V8_3 (1 << 10) /* Has ARMv8.3-A features. */ > +#define AARCH64_FL_RCPC (1 << 11) /* Has support for RCpc model. */ > > /* Has FP and SIMD. */ > #define AARCH64_FL_FPSIMD (AARCH64_FL_FP | AARCH64_FL_SIMD) >
On Tue, Jun 20, 2017 at 6:50 AM, James Greenhalgh <james.greenhalgh@arm.com> wrote: > > Hi, > > While GCC doesn't need to know anything about the RcPc extension for code > generation, we do need to add the extension flag to the string we pass > to the assembler when we're compiling for a CPU which implements the RcPc > extension. > > I've built a toolchain with this patch applied, and checked that we > correctly pass +rcpc on to the assembler if we give something like > -mcpu=generic+rcpc . > > OK? I think you forgot to update the documentation for this option extension. https://gcc.gnu.org/onlinedocs/gcc/AArch64-Options.html#g_t-march-and--mcpu-Feature-Modifiers I suspect there are other missing here too. Thanks, Andrew > > Thanks, > James > > --- > 2017-06-20 James Greenhalgh <james.greenhalgh@arm.com> > > * config/aarch64/aarch64-option-extensions.def (rcpc): New. > * config/aarch64/aarch64.h (AARCH64_FL_RCPC): New. >
diff --git a/gcc/config/aarch64/aarch64-option-extensions.def b/gcc/config/aarch64/aarch64-option-extensions.def index b54de03..c0752ce 100644 --- a/gcc/config/aarch64/aarch64-option-extensions.def +++ b/gcc/config/aarch64/aarch64-option-extensions.def @@ -60,4 +60,7 @@ AARCH64_OPT_EXTENSION("lse", AARCH64_FL_LSE, 0, 0, "atomics") Disabling "fp16" just disables "fp16". */ AARCH64_OPT_EXTENSION("fp16", AARCH64_FL_F16, AARCH64_FL_FP, 0, "fphp asimdhp") +/* Enabling or disabling "rcpc" only changes "rcpc". */ +AARCH64_OPT_EXTENSION("rcpc", AARCH64_FL_RCPC, 0, 0, "lrcpc") + #undef AARCH64_OPT_EXTENSION diff --git a/gcc/config/aarch64/aarch64.h b/gcc/config/aarch64/aarch64.h index e4fb96f..3b3f27e 100644 --- a/gcc/config/aarch64/aarch64.h +++ b/gcc/config/aarch64/aarch64.h @@ -140,6 +140,7 @@ extern unsigned aarch64_architecture_version; #define AARCH64_FL_F16 (1 << 9) /* Has ARMv8.2-A FP16 extensions. */ /* ARMv8.3-A architecture extensions. */ #define AARCH64_FL_V8_3 (1 << 10) /* Has ARMv8.3-A features. */ +#define AARCH64_FL_RCPC (1 << 11) /* Has support for RCpc model. */ /* Has FP and SIMD. */ #define AARCH64_FL_FPSIMD (AARCH64_FL_FP | AARCH64_FL_SIMD)