From patchwork Tue Feb 21 16:54:23 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Charles Baylis X-Patchwork-Id: 730694 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from sourceware.org (server1.sourceware.org [209.132.180.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 3vSRSH6pPBz9s2Q for ; Wed, 22 Feb 2017 03:54:55 +1100 (AEDT) Authentication-Results: ozlabs.org; dkim=pass (1024-bit key; unprotected) header.d=gcc.gnu.org header.i=@gcc.gnu.org header.b="of9wlRGn"; dkim-atps=neutral DomainKey-Signature: a=rsa-sha1; c=nofws; d=gcc.gnu.org; h=list-id :list-unsubscribe:list-archive:list-post:list-help:sender:from :to:cc:subject:date:message-id:in-reply-to:references; q=dns; s= default; b=qAR+dKa8V/ujU5g262oADn2gAt4MbXnJO8IFLoyQxHf6pzoleueqV Hs35H/82Z/OchDJ1hA5ZpqP/7+ryNQdasnVkqxj6MNQLgKmFVmSHQE+sD3maGSTO vjti7JraneSR7oJhW8wLbFyaT5SiRtiBJX1szrmvurNAx8J335Bf1s= DKIM-Signature: v=1; a=rsa-sha1; c=relaxed; d=gcc.gnu.org; h=list-id :list-unsubscribe:list-archive:list-post:list-help:sender:from :to:cc:subject:date:message-id:in-reply-to:references; s= default; bh=KKbA4fiNLcPJ0x9EdQUWjy+UDUk=; b=of9wlRGnKSMNjuGcjOei m7kJKZwHlGIPCfaHUDDV0OkpS1EazrC9Uh1WvsL9+f3+19yopH3HQoBlDVo/LBoE zmiEldEBw1TM0VkgZSB4rqZkmgo2z/HMcxtypU2m3UciWopEdwsODJ9wrsJHxXv1 5R/k8SKJ607q25i/5MHG1GI= Received: (qmail 115343 invoked by alias); 21 Feb 2017 16:54:35 -0000 Mailing-List: contact gcc-patches-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: List-Unsubscribe: List-Archive: List-Post: List-Help: Sender: gcc-patches-owner@gcc.gnu.org Delivered-To: mailing list gcc-patches@gcc.gnu.org Received: (qmail 115255 invoked by uid 89); 21 Feb 2017 16:54:35 -0000 Authentication-Results: sourceware.org; auth=none X-Virus-Found: No X-Spam-SWARE-Status: No, score=-24.9 required=5.0 tests=AWL, BAYES_00, GIT_PATCH_0, GIT_PATCH_1, GIT_PATCH_2, GIT_PATCH_3, RCVD_IN_DNSWL_NONE, RCVD_IN_SORBS_SPAM, SPF_PASS autolearn=ham version=3.3.2 spammy=sk:charles, bus, HX-Envelope-From:sk:charles, Charles X-HELO: mail-wm0-f44.google.com Received: from mail-wm0-f44.google.com (HELO mail-wm0-f44.google.com) (74.125.82.44) by sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with ESMTP; Tue, 21 Feb 2017 16:54:33 +0000 Received: by mail-wm0-f44.google.com with SMTP id 196so30305743wmm.1 for ; Tue, 21 Feb 2017 08:54:33 -0800 (PST) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=F0fUfOnGMcsCPwsXPLz8OJzhfR6XDNL7EycVjioQgR0=; b=ZDGVIcg87Uk4C5Ede5DeygPyAPH+LCHIXCb84nk7f99qzBBPwIEwbnjDdGhzgXAR9N 73mpR7zNFvxOsWb4yRUloO9v7HKo4nK0ezYBLw3oMEGEXRSHFXH3H7RGPBZMnFTNbI3M 0yqqAwrNfwk7NyQLwBx05xYGw6f8SQixDRSwXQ0KEm+op/ah8vB89xAOwAhpEJ61loQ1 y5jmDEPmgtMPDkeef8hFxGz/5iGRowHivhz7pshmwC1Oajs3k7x5qt8nhtzuRGWSaBIE 5vF5c4YCH0l+yAgnkyQ3T83ENn2YAnIXi6fy9XS1Tf+ami4RT7Zne6kQECPETPreMKHi yqIw== X-Gm-Message-State: AMke39lGDrwANSDe+52EcrPJLmZ2kL9JQkddY0GYrmBkN2bbxxYPV+5nfYCFdLjfl1/T5WMW X-Received: by 10.28.165.196 with SMTP id o187mr25262340wme.6.1487696071840; Tue, 21 Feb 2017 08:54:31 -0800 (PST) Received: from localhost.localdomain ([85.255.232.30]) by smtp.gmail.com with ESMTPSA id i73sm18293060wmd.11.2017.02.21.08.54.30 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Tue, 21 Feb 2017 08:54:31 -0800 (PST) From: charles.baylis@linaro.org To: Ramana.Radhakrishnan@arm.com, kyrylo.tkachov@arm.com Cc: rearnsha@arm.com, gcc-patches@gcc.gnu.org Subject: [PATCH 1/2] [ARM] Refactor costs calculation for MEM. Date: Tue, 21 Feb 2017 16:54:23 +0000 Message-Id: <1487696064-3233-2-git-send-email-charles.baylis@linaro.org> In-Reply-To: <1487696064-3233-1-git-send-email-charles.baylis@linaro.org> References: <1487696064-3233-1-git-send-email-charles.baylis@linaro.org> X-IsSubscribed: yes From: Charles Baylis This patch moves the calculation of costs for MEM into a separate function, and reforms the calculation into two parts. Firstly any additional cost of the addressing mode is calculated, and then the cost of the memory access itself is added. In this patch, the calculation of the cost of the addressing mode is left as a placeholder, to be added in a subsequent patch. gcc/ChangeLog: Charles Baylis * config/arm/arm.c (arm_mem_costs): New function. (arm_rtx_costs_internal): Use arm_mem_costs. Change-Id: I99e93406ea39ee31f71c7bf428ad3e127b7a618e --- gcc/config/arm/arm.c | 66 +++++++++++++++++++++++++++++++++------------------- 1 file changed, 42 insertions(+), 24 deletions(-) diff --git a/gcc/config/arm/arm.c b/gcc/config/arm/arm.c index 6cae178..7f002f1 100644 --- a/gcc/config/arm/arm.c +++ b/gcc/config/arm/arm.c @@ -9072,6 +9072,47 @@ arm_unspec_cost (rtx x, enum rtx_code /* outer_code */, bool speed_p, int *cost) } \ while (0); +/* Helper function for arm_rtx_costs_internal. Calculates the cost of a MEM, + considering the costs of the addressing mode and memory access + separately. */ +static bool +arm_mem_costs (rtx x, const struct cpu_cost_table *extra_cost, + int *cost, bool speed_p) +{ + machine_mode mode = GET_MODE (x); + if (flag_pic + && GET_CODE (XEXP (x, 0)) == PLUS + && will_be_in_index_register (XEXP (XEXP (x, 0), 1))) + /* This will be split into two instructions. Add the cost of the + additional instruction here. The cost of the memory access is computed + below. See arm.md:calculate_pic_address. */ + *cost = COSTS_N_INSNS (1); + else + *cost = 0; + + /* Calculate cost of the addressing mode. */ + if (speed_p) + { + /* TODO: Add table-driven costs for addressing modes. */ + } + + /* cost of memory access */ + if (speed_p) + { + /* data transfer is transfer size divided by bus width. */ + int bus_width = arm_arch7 ? 8 : 4; + *cost += COSTS_N_INSNS((GET_MODE_SIZE (mode) + bus_width - 1) / bus_width); + *cost += extra_cost->ldst.load; + } else { + *cost += COSTS_N_INSNS (1); + } + + return true; +} +/* Convert fron bytes to ints. */ +#define ARM_NUM_INTS(X) (((X) + UNITS_PER_WORD - 1) / UNITS_PER_WORD) + + /* RTX costs. Make an estimate of the cost of executing the operation X, which is contained with an operation with code OUTER_CODE. SPEED_P indicates whether the cost desired is the performance cost, @@ -9152,30 +9193,7 @@ arm_rtx_costs_internal (rtx x, enum rtx_code code, enum rtx_code outer_code, return false; case MEM: - /* A memory access costs 1 insn if the mode is small, or the address is - a single register, otherwise it costs one insn per word. */ - if (REG_P (XEXP (x, 0))) - *cost = COSTS_N_INSNS (1); - else if (flag_pic - && GET_CODE (XEXP (x, 0)) == PLUS - && will_be_in_index_register (XEXP (XEXP (x, 0), 1))) - /* This will be split into two instructions. - See arm.md:calculate_pic_address. */ - *cost = COSTS_N_INSNS (2); - else - *cost = COSTS_N_INSNS (ARM_NUM_REGS (mode)); - - /* For speed optimizations, add the costs of the address and - accessing memory. */ - if (speed_p) -#ifdef NOT_YET - *cost += (extra_cost->ldst.load - + arm_address_cost (XEXP (x, 0), mode, - ADDR_SPACE_GENERIC, speed_p)); -#else - *cost += extra_cost->ldst.load; -#endif - return true; + return arm_mem_costs (x, extra_cost, cost, speed_p); case PARALLEL: {