From patchwork Tue Dec 15 21:09:17 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Steve Ellcey X-Patchwork-Id: 557081 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from sourceware.org (server1.sourceware.org [209.132.180.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 2DD8014030D for ; Wed, 16 Dec 2015 08:09:33 +1100 (AEDT) Authentication-Results: ozlabs.org; dkim=pass (1024-bit key; unprotected) header.d=gcc.gnu.org header.i=@gcc.gnu.org header.b=sUrUYVJU; dkim-atps=neutral DomainKey-Signature: a=rsa-sha1; c=nofws; d=gcc.gnu.org; h=list-id :list-unsubscribe:list-archive:list-post:list-help:sender :message-id:subject:from:reply-to:to:cc:date:in-reply-to :references:content-type:content-transfer-encoding:mime-version; q=dns; s=default; b=QI2beqOTjvoPGYlD54T9wwvWPTrHiTAex4M0+W/y6SZ mnoLMaeMJdJXHafvn1PispRzYffcPoHPjWzUW1aJ+GLDTv4z/Vdr+hL+K+w9ArIk 62e8XbM9DP3m/DXxt8zyCAMbauDjID2dCcID3gWWsbqKZhxzKL5eYbPFNIO/xtf8 = DKIM-Signature: v=1; a=rsa-sha1; c=relaxed; d=gcc.gnu.org; h=list-id :list-unsubscribe:list-archive:list-post:list-help:sender :message-id:subject:from:reply-to:to:cc:date:in-reply-to :references:content-type:content-transfer-encoding:mime-version; s=default; bh=TcgGUxQOFwn4KUhHXl2i6+ZhZzs=; b=sUrUYVJUGU+UtborN QjG6mUkiJmxaz6sZKpm37QNLvBA2LfB+UexBzPe95yg4OdCPZAVkVCiD4sk7TzCo FymBx51u3UdcRlviErEpjIebTcMGxt07K5b2M3mnQipO+HvvX9D4jeURIfOwr18m EtZVrRNIxM5XEgwEItlmm7R1x0= Received: (qmail 8779 invoked by alias); 15 Dec 2015 21:09:25 -0000 Mailing-List: contact gcc-patches-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: List-Unsubscribe: List-Archive: List-Post: List-Help: Sender: gcc-patches-owner@gcc.gnu.org Delivered-To: mailing list gcc-patches@gcc.gnu.org Received: (qmail 8764 invoked by uid 89); 15 Dec 2015 21:09:24 -0000 Authentication-Results: sourceware.org; auth=none X-Virus-Found: No X-Spam-SWARE-Status: No, score=-2.4 required=5.0 tests=AWL, BAYES_00, RCVD_IN_DNSWL_LOW, SPF_PASS, T_RP_MATCHES_RCVD autolearn=ham version=3.3.2 X-HELO: mailapp01.imgtec.com Received: from mailapp01.imgtec.com (HELO mailapp01.imgtec.com) (195.59.15.196) by sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with ESMTP; Tue, 15 Dec 2015 21:09:23 +0000 Received: from HHMAIL01.hh.imgtec.org (unknown [10.100.10.19]) by Websense Email Security Gateway with ESMTPS id 1D1F4C7259C09; Tue, 15 Dec 2015 21:09:17 +0000 (GMT) Received: from BAMAIL02.ba.imgtec.org (10.20.40.28) by HHMAIL01.hh.imgtec.org (10.100.10.19) with Microsoft SMTP Server (TLS) id 14.3.235.1; Tue, 15 Dec 2015 21:09:21 +0000 Received: from [10.20.3.214] (10.20.3.214) by bamail02.ba.imgtec.org (10.20.40.28) with Microsoft SMTP Server (TLS) id 14.3.174.1; Tue, 15 Dec 2015 13:09:17 -0800 Message-ID: <1450213757.4788.125.camel@ubuntu-sellcey> Subject: RE: [Patch] Fix for MIPS PR target/65604 From: Steve Ellcey Reply-To: To: "Moore, Catherine" CC: "gcc-patches@gcc.gnu.org" , "matthew.fortune@imgtec.com" Date: Tue, 15 Dec 2015 13:09:17 -0800 In-Reply-To: References: <3bc15df0-329f-43ed-820a-5de264b5c7c3@BAMAIL02.ba.imgtec.org> MIME-Version: 1.0 On Tue, 2015-12-15 at 15:13 +0000, Moore, Catherine wrote: > > HI Steve, The patch is OK. Will you please add a test case and repost? > Thanks, > Catherine Here is the patch with a test case. 2015-12-15 Steve Ellcey PR target/65604 * config/mips/mips.c (mips_output_division): Check flag_delayed_branch. diff --git a/gcc/config/mips/mips.c b/gcc/config/mips/mips.c index 6145944..8444a91 100644 --- a/gcc/config/mips/mips.c +++ b/gcc/config/mips/mips.c @@ -13687,9 +13687,17 @@ mips_output_division (const char *division, rtx *operands) } else { - output_asm_insn ("%(bne\t%2,%.,1f", operands); - output_asm_insn (s, operands); - s = "break\t7%)\n1:"; + if (flag_delayed_branch) + { + output_asm_insn ("%(bne\t%2,%.,1f", operands); + output_asm_insn (s, operands); + s = "break\t7%)\n1:"; + } + else + { + output_asm_insn (s, operands); + s = "bne\t%2,%.,1f\n\tnop\n\tbreak\t7\n1:"; + } } } return s; 2015-12-15 Steve Ellcey PR target/65604 * gcc.target/mips/div-delay.c: New test. diff --git a/gcc/testsuite/gcc.target/mips/div-delay.c b/gcc/testsuite/gcc.target/mips/div-delay.c index e69de29..bdeb125 100644 --- a/gcc/testsuite/gcc.target/mips/div-delay.c +++ b/gcc/testsuite/gcc.target/mips/div-delay.c @@ -0,0 +1,13 @@ +/* { dg-do compile } */ +/* { dg-options "-march=mips1 -fno-delayed-branch" } */ +/* { dg-final { scan-assembler "\tbne\t.*\tnop" } } */ + +/* Ensure that mips1 does not put anything in the delay slot of the bne + instruction when checking for divide by zero. mips2+ systems use teq + instead of bne and teq has no delay slot. */ + +NOCOMPRESSION int +foo (int a, int b) +{ + return a / b; +}