From patchwork Fri Oct 2 12:36:26 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Oleg Endo X-Patchwork-Id: 525477 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from sourceware.org (server1.sourceware.org [209.132.180.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id DBDAA140311 for ; Fri, 2 Oct 2015 22:36:46 +1000 (AEST) Authentication-Results: ozlabs.org; dkim=pass (1024-bit key; unprotected) header.d=gcc.gnu.org header.i=@gcc.gnu.org header.b=qLPJTv39; dkim-atps=neutral DomainKey-Signature: a=rsa-sha1; c=nofws; d=gcc.gnu.org; h=list-id :list-unsubscribe:list-archive:list-post:list-help:sender :message-id:subject:from:to:date:content-type:mime-version; q= dns; s=default; b=N2ZA24rKRIePtzBhpAc/Mfho/zvOYZOdygNlGGRvlZuUFe 64d2kVM6ZXacmnp6sjUz6pFrMwAU+lz6cH0ZveRukYu7H3jyh5t/LDmPJyHkM1ht owwKHaqnipnHgRpYEF/+Ep8kQC/ofLVKZld+mGnCmrQeSI8QC6PzckfgaG5Pw= DKIM-Signature: v=1; a=rsa-sha1; c=relaxed; d=gcc.gnu.org; h=list-id :list-unsubscribe:list-archive:list-post:list-help:sender :message-id:subject:from:to:date:content-type:mime-version; s= default; bh=Yh3bBkTcXrE7uoX1XbOOwxbNED4=; b=qLPJTv39Ms98hBX2pvw4 XuNfTP8C6NBn/eSTrzj/YDkjGJMAF3ThuWNmsvIrtAPG3tfvtYtpdU/shpPg1y6B R0RTbUPtFKBpi51AC1BTjZpfpziqwErKd5uiJUgyaVNq6vsMRiEIgjGtaY8aQdNB Ql8MIDw7YFZk3ceHo0vSH7w= Received: (qmail 13610 invoked by alias); 2 Oct 2015 12:36:39 -0000 Mailing-List: contact gcc-patches-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: List-Unsubscribe: List-Archive: List-Post: List-Help: Sender: gcc-patches-owner@gcc.gnu.org Delivered-To: mailing list gcc-patches@gcc.gnu.org Received: (qmail 13599 invoked by uid 89); 2 Oct 2015 12:36:39 -0000 Authentication-Results: sourceware.org; auth=none X-Virus-Found: No X-Spam-SWARE-Status: No, score=1.1 required=5.0 tests=AWL, BAYES_50, KAM_LAZY_DOMAIN_SECURITY, RCVD_IN_DNSWL_NONE, T_RP_MATCHES_RCVD autolearn=no version=3.3.2 X-HELO: mailout07.t-online.de Received: from mailout07.t-online.de (HELO mailout07.t-online.de) (194.25.134.83) by sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with (AES256-GCM-SHA384 encrypted) ESMTPS; Fri, 02 Oct 2015 12:36:37 +0000 Received: from fwd32.aul.t-online.de (fwd32.aul.t-online.de [172.20.26.144]) by mailout07.t-online.de (Postfix) with SMTP id 6C239C65E5 for ; Fri, 2 Oct 2015 14:36:33 +0200 (CEST) Received: from [192.168.0.16] (X7m-WTZJohwpHJNb2efVKHAMxkwa-gv4REHmF+-k6DtCUOuSwRYjuweLeOWyczKgfm@[115.165.93.200]) by fwd32.t-online.de with (TLSv1.2:ECDHE-RSA-AES256-GCM-SHA384 encrypted) esmtp id 1ZhzZd-48x6Rs0; Fri, 2 Oct 2015 14:36:29 +0200 Message-ID: <1443789386.2031.143.camel@t-online.de> Subject: [SH][committed] From: Oleg Endo To: gcc-patches Date: Fri, 02 Oct 2015 21:36:26 +0900 Mime-Version: 1.0 X-IsSubscribed: yes Hi, The attached SH patch converts sequences such as: movt r2 movt r13 into: movt r2 mov r2,r13 This shortens the live range of the T bit register and is better for parallel execution. It doesn't happen often, but it's easy to avoid it. Unfortunately I had to do this manually because cprop_hardreg gets in the way here. If done as a peephole2, cprop_hardreg then unconditionally just converts it back, because it thinks that all reg copies are equal in some way. Tested on sh-elf with make -k check RUNTESTFLAGS="--target_board=sh-sim \{-m2/-ml,-m2/-mb,-m2a/-mb,-m4/-ml,-m4/-mb,-m4a/-ml,-m4a/-mb}" Committed as r228386. Cheers, Oleg gcc/ChangeLog: * config/sh/sh.md: Add new unnamed split pattern to handle movt-movt sequences. Index: gcc/config/sh/sh.md =================================================================== --- gcc/config/sh/sh.md (revision 228331) +++ gcc/config/sh/sh.md (working copy) @@ -14860,6 +14860,46 @@ gen_rtx_REG (SImode, (REGNO (operands[1]))))); }) +;; This is not a peephole, but it's here because it's actually supposed +;; to be one. It tries to convert a sequence such as +;; movt r2 -> movt r2 +;; movt r13 mov r2,r13 +;; This gives the schduler a bit more freedom to hoist a following +;; comparison insn. Moreover, it the reg-reg mov insn is MT group which has +;; better chances for parallel execution. +;; We can do this with a peephole2 pattern, but then the cprop_hardreg +;; pass will revert the change. See also PR 64331. +;; Thus do it manually in one of the split passes after register allocation. +;; Sometimes the cprop_hardreg pass might also eliminate the reg-reg copy. +(define_split + [(set (match_operand:SI 0 "arith_reg_dest") + (match_operand:SI 1 "t_reg_operand"))] + "TARGET_SH1 && reload_completed" + [(set (match_dup 0) (match_dup 1))] +{ + rtx t_reg = get_t_reg_rtx (); + + for (rtx_insn* i = prev_nonnote_insn_bb (curr_insn); i != NULL; + i = prev_nonnote_insn_bb (i)) + { + if (!INSN_P (i) || DEBUG_INSN_P (i)) + continue; + + if (modified_in_p (t_reg, i) || BARRIER_P (i)) + FAIL; + + if (sh_is_movt_insn (i)) + { + rtx r = sh_movt_set_dest (i); + if (!modified_between_p (r, i, curr_insn)) + { + operands[1] = r; + break; + } + } + } +}) + (define_peephole [(set (match_operand:SI 0 "register_operand" "=r") (plus:SI (match_dup 0) (match_operand:SI 1 "register_operand" "r")))