diff mbox

[mips] Follow up to pr54061 patch, fix another abort.

Message ID 1355330520.1420.1.camel@ubuntu-sellcey
State New
Headers show

Commit Message

Steve Ellcey Dec. 12, 2012, 4:42 p.m. UTC
On Wed, 2012-12-12 at 08:21 +0000, Richard Sandiford wrote:

> I'm pretty sure we'll need more eventually though.  A quick inspection
> shows that we don't set mips_dbx_regno for DSP_ACC_REGS or ST_REGS.
> DSP_ACC_REGS in paticular seems likely to hit, although you need to
> test with an -mdsp option to get coverage.  It's even conceivable
> that we could end up with info for GOT_VERSION_REGNUM.
> 
> I don't think we really gain much by trying to distinguish in mips_dbx_regno
> between INVALID_REGNUM (register isn't used at all by the compiler) and
> IGNORED_DWARF_REGNUM.  Especially since we don't distinguish between
> registers that have been disabled through -msoft-float, -mips3 and below
> (for ST_REGS other than $fcc0), -mno-dsp, etc.
> 
> Richard

OK, you have convinced me.  Here is what I am testing, OK to checkin
once I have run it through the testsuite?

Steve Ellcey
sellcey@mips.com


2012-12-12  Steve Ellcey  <sellcey@mips.com>

	* config/mips/mips.c (mips_option_override): Set
	mips_dbx_regno entries to IGNORED_DWARF_REGNUM by default.

Comments

Richard Sandiford Dec. 12, 2012, 7:22 p.m. UTC | #1
Steve Ellcey <sellcey@mips.com> writes:
> OK, you have convinced me.  Here is what I am testing, OK to checkin
> once I have run it through the testsuite?

Yeah, looks good, thanks.

Richard
diff mbox

Patch

diff --git a/gcc/config/mips/mips.c b/gcc/config/mips/mips.c
index 820b228..7ac8bb7 100644
--- a/gcc/config/mips/mips.c
+++ b/gcc/config/mips/mips.c
@@ -16742,7 +16742,7 @@  mips_option_override (void)
 
   for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
     {
-      mips_dbx_regno[i] = INVALID_REGNUM;
+      mips_dbx_regno[i] = IGNORED_DWARF_REGNUM;
       if (GP_REG_P (i) || FP_REG_P (i) || ALL_COP_REG_P (i))
 	mips_dwarf_regno[i] = i;
       else
@@ -16757,9 +16757,6 @@  mips_option_override (void)
   for (i = FP_REG_FIRST; i <= FP_REG_LAST; i++)
     mips_dbx_regno[i] = i + start;
 
-  for (i = ALL_COP_REG_FIRST; i <= ALL_COP_REG_LAST; i++)
-    mips_dbx_regno[i] = IGNORED_DWARF_REGNUM;
-
   /* Accumulator debug registers use big-endian ordering.  */
   mips_dbx_regno[HI_REGNUM] = MD_DBX_FIRST + 0;
   mips_dbx_regno[LO_REGNUM] = MD_DBX_FIRST + 1;