diff mbox series

[AARCH64] Fix immediate alternative of movhf_aarch64 pattern.

Message ID 0a56bab2-06f6-48df-4897-2ddca3b6e5d8@foss.arm.com
State New
Headers show
Series [AARCH64] Fix immediate alternative of movhf_aarch64 pattern. | expand

Commit Message

Renlin Li March 7, 2018, 11:23 a.m. UTC
Hi all,

For the immediate alternative, the constraint checks the operand with HF mode
while SImode is provided to the output template generation function.

Before the change, this inconsistency causes an ICE compiling the new test case in the patch.


aarch64-none-elf regression test Okay. Okay to commit the patch?

Regards,
Renlin

gcc/ChangeLog:

2018-03-07  Renlin Li  <renlin.li@arm.com>

	* config/aarch64/aarch64.md (movhf_aarch64): Fix mode argument to
	aarch64_output_scalar_simd_mov_immediate.

gcc/testsuite/ChangeLog:

2018-03-07  Renlin Li  <renlin.li@arm.com>

	* gcc.target/aarch64/movi_hf.c: New.
	* gcc.target/aarch64/f16_mov_immediate_1.c: Update.

Comments

James Greenhalgh March 8, 2018, 1:32 p.m. UTC | #1
On Wed, Mar 07, 2018 at 11:23:10AM +0000, Renlin Li wrote:
> Hi all,
> 
> For the immediate alternative, the constraint checks the operand with HF mode
> while SImode is provided to the output template generation function.
> 
> Before the change, this inconsistency causes an ICE compiling the new test case in the patch.
> 
> 
> aarch64-none-elf regression test Okay. Okay to commit the patch?

OK.

Thanks,
James

> gcc/ChangeLog:
> 
> 2018-03-07  Renlin Li  <renlin.li@arm.com>
> 
> 	* config/aarch64/aarch64.md (movhf_aarch64): Fix mode argument to
> 	aarch64_output_scalar_simd_mov_immediate.
> 
> gcc/testsuite/ChangeLog:
> 
> 2018-03-07  Renlin Li  <renlin.li@arm.com>
> 
> 	* gcc.target/aarch64/movi_hf.c: New.
> 	* gcc.target/aarch64/f16_mov_immediate_1.c: Update.

> diff --git a/gcc/config/aarch64/aarch64.md b/gcc/config/aarch64/aarch64.md
> index 5a2a9309a3bbbfad6fcb6db07422d774909f0ba1..391fdd07e52f4d165a0109e3baa82571bafa37de 100644
> --- a/gcc/config/aarch64/aarch64.md
> +++ b/gcc/config/aarch64/aarch64.md
> @@ -1145,7 +1145,7 @@
>     umov\\t%w0, %1.h[0]
>     mov\\t%0.h[0], %1.h[0]
>     fmov\\t%h0, %1
> -   * return aarch64_output_scalar_simd_mov_immediate (operands[1], SImode);
> +   * return aarch64_output_scalar_simd_mov_immediate (operands[1], HImode);
>     ldr\\t%h0, %1
>     str\\t%h1, %0
>     ldrh\\t%w0, %1
> diff --git a/gcc/testsuite/gcc.target/aarch64/f16_mov_immediate_1.c b/gcc/testsuite/gcc.target/aarch64/f16_mov_immediate_1.c
> index 1ed3831e139745227487eafa3ccfdc05c99deb34..3d22d225851af653f17e04ce7c7cc65ee1c86172 100644
> --- a/gcc/testsuite/gcc.target/aarch64/f16_mov_immediate_1.c
> +++ b/gcc/testsuite/gcc.target/aarch64/f16_mov_immediate_1.c
> @@ -45,5 +45,5 @@ __fp16 f5 ()
>  }
>  
>  /* { dg-final { scan-assembler-times "mov\tw\[0-9\]+, #?19520"           3 } } */
> -/* { dg-final { scan-assembler-times "movi\tv\[0-9\]+\\\.2s, 0xbc, lsl 8"  1 } } */
> -/* { dg-final { scan-assembler-times "movi\tv\[0-9\]+\\\.2s, 0x4c, lsl 8"  1 } } */
> +/* { dg-final { scan-assembler-times "movi\tv\[0-9\]+\\\.4h, 0xbc, lsl 8"  1 } } */
> +/* { dg-final { scan-assembler-times "movi\tv\[0-9\]+\\\.4h, 0x4c, lsl 8"  1 } } */
> diff --git a/gcc/testsuite/gcc.target/aarch64/movi_hf.c b/gcc/testsuite/gcc.target/aarch64/movi_hf.c
> new file mode 100644
> index 0000000000000000000000000000000000000000..9521b9b09c87bd5f19cb6b62b1228bae685d8667
> --- /dev/null
> +++ b/gcc/testsuite/gcc.target/aarch64/movi_hf.c
> @@ -0,0 +1,9 @@
> +/* { dg-do compile } */
> +/* { dg-options "-O0 -std=c99" } */
> +
> +__fp16
> +foo ()
> +{
> +  /* { dg-final { scan-assembler "movi\tv\[0-9\]+\.8b" } } */
> +  return 0x1.544p5;
> +}
diff mbox series

Patch

diff --git a/gcc/config/aarch64/aarch64.md b/gcc/config/aarch64/aarch64.md
index 5a2a9309a3bbbfad6fcb6db07422d774909f0ba1..391fdd07e52f4d165a0109e3baa82571bafa37de 100644
--- a/gcc/config/aarch64/aarch64.md
+++ b/gcc/config/aarch64/aarch64.md
@@ -1145,7 +1145,7 @@ 
    umov\\t%w0, %1.h[0]
    mov\\t%0.h[0], %1.h[0]
    fmov\\t%h0, %1
-   * return aarch64_output_scalar_simd_mov_immediate (operands[1], SImode);
+   * return aarch64_output_scalar_simd_mov_immediate (operands[1], HImode);
    ldr\\t%h0, %1
    str\\t%h1, %0
    ldrh\\t%w0, %1
diff --git a/gcc/testsuite/gcc.target/aarch64/f16_mov_immediate_1.c b/gcc/testsuite/gcc.target/aarch64/f16_mov_immediate_1.c
index 1ed3831e139745227487eafa3ccfdc05c99deb34..3d22d225851af653f17e04ce7c7cc65ee1c86172 100644
--- a/gcc/testsuite/gcc.target/aarch64/f16_mov_immediate_1.c
+++ b/gcc/testsuite/gcc.target/aarch64/f16_mov_immediate_1.c
@@ -45,5 +45,5 @@  __fp16 f5 ()
 }
 
 /* { dg-final { scan-assembler-times "mov\tw\[0-9\]+, #?19520"           3 } } */
-/* { dg-final { scan-assembler-times "movi\tv\[0-9\]+\\\.2s, 0xbc, lsl 8"  1 } } */
-/* { dg-final { scan-assembler-times "movi\tv\[0-9\]+\\\.2s, 0x4c, lsl 8"  1 } } */
+/* { dg-final { scan-assembler-times "movi\tv\[0-9\]+\\\.4h, 0xbc, lsl 8"  1 } } */
+/* { dg-final { scan-assembler-times "movi\tv\[0-9\]+\\\.4h, 0x4c, lsl 8"  1 } } */
diff --git a/gcc/testsuite/gcc.target/aarch64/movi_hf.c b/gcc/testsuite/gcc.target/aarch64/movi_hf.c
new file mode 100644
index 0000000000000000000000000000000000000000..9521b9b09c87bd5f19cb6b62b1228bae685d8667
--- /dev/null
+++ b/gcc/testsuite/gcc.target/aarch64/movi_hf.c
@@ -0,0 +1,9 @@ 
+/* { dg-do compile } */
+/* { dg-options "-O0 -std=c99" } */
+
+__fp16
+foo ()
+{
+  /* { dg-final { scan-assembler "movi\tv\[0-9\]+\.8b" } } */
+  return 0x1.544p5;
+}