| Message ID | 04fda9f5682df52bbc35d18861caead110d0d8bf.1650575998.git.segher@kernel.crashing.org |
|---|---|
| State | New |
| Headers | show |
| Series | rs6000: Disparage lfiwzx and similar | expand |
diff --git a/gcc/testsuite/gcc.target/powerpc/bswap-brw.c b/gcc/testsuite/gcc.target/powerpc/bswap-brw.c index b3f923eea848..0ed2a7bd1d25 100644 --- a/gcc/testsuite/gcc.target/powerpc/bswap-brw.c +++ b/gcc/testsuite/gcc.target/powerpc/bswap-brw.c @@ -17,6 +17,6 @@ bswap_int_dbl (unsigned int a) /* Force the value to be loaded into a vector register. */ __asm__ (" # %x0" : "+wa" (b)); - /* { dg-final { scan-assembler {\mxxbrw\M} } } */ + /* { dg-final { scan-assembler {\mxxbrw\M} {xfail {has_arch_pwr10 && {! has_arch_ppc64}}} } } */ return (double) __builtin_bswap32 (b); }
This testcase does not generate anywhere near optimal code for 32-bit code. For p10 it actually now fails this testcase, after the previous patch. Let's xfail it. 2022-04-21 Segher Boessenkool <segher@kernel.crashing.org> gcc/testsuite/ PR target/103197 PR target/102146 * gcc.target/powerpc/bswap-brw.c: Add xfail on scan-assembler for -m32. --- gcc/testsuite/gcc.target/powerpc/bswap-brw.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)