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[committed] PR target/81084: Hide more irrelevant powerpcspe options

Message ID 0391b2b1-c791-535d-8aaa-c8847fd82880@codesourcery.com
State New
Headers show
Series [committed] PR target/81084: Hide more irrelevant powerpcspe options | expand

Commit Message

Andrew Jenner Feb. 6, 2018, 4:11 p.m. UTC 
I have committed this patch to suppress some more irrelevant options 
from the output of "gcc --target-help" for the powerpcspe backend.

I have tested this by rebuilding GCC and checking the output of "gcc 
--target-help".


2018-02-02  Andrew Jenner  <andrew@codesourcery.com>

         * config/powerpcspe/powerpcspe.opt: (msimple-fpu, mfpu) Add 
Undocumented.
         * config/powerpcspe/sysv4.opt (mbit-align): Likewise.
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Patch

Index: gcc/config/powerpcspe/powerpcspe.opt
===================================================================
--- gcc/config/powerpcspe/powerpcspe.opt	(revision 257416)
+++ gcc/config/powerpcspe/powerpcspe.opt	(working copy)
@@ -516,11 +516,11 @@  Target RejectNegative Var(rs6000_double_
 Double-precision floating point unit.
 
 msimple-fpu
-Target RejectNegative Var(rs6000_simple_fpu) Save
+Target Undocumented RejectNegative Var(rs6000_simple_fpu) Save
 Floating point unit does not support divide & sqrt.
 
 mfpu=
-Target RejectNegative Joined Enum(fpu_type_t) Var(rs6000_fpu_type) Init(FPU_NONE)
+Target Undocumented RejectNegative Joined Enum(fpu_type_t) Var(rs6000_fpu_type) Init(FPU_NONE)
 -mfpu=	Specify FP (sp, dp, sp-lite, dp-lite) (implies -mxilinx-fpu).
 
 Enum
Index: gcc/config/powerpcspe/sysv4.opt
===================================================================
--- gcc/config/powerpcspe/sysv4.opt	(revision 257416)
+++ gcc/config/powerpcspe/sysv4.opt	(working copy)
@@ -44,7 +44,7 @@  EnumValue
 Enum(rs6000_tls_size) String(64) Value(64)
 
 mbit-align
-Target Report Var(TARGET_NO_BITFIELD_TYPE) Save
+Target Undocumented Report Var(TARGET_NO_BITFIELD_TYPE) Save
 Align to the base type of the bit-field.
 
 mstrict-align