From patchwork Thu Nov 29 14:27:15 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Kyrylo Tkachov X-Patchwork-Id: 202756 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from sourceware.org (server1.sourceware.org [209.132.180.131]) by ozlabs.org (Postfix) with SMTP id 453262C0087 for ; Fri, 30 Nov 2012 01:28:01 +1100 (EST) Comment: DKIM? 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It also gathers the unspec definitions in the various .md files in one file: unspecs.md. A new iterator is defined that iterates over some new unspecs, in a similar way to the scalar vrint implementation. No regressions on arm-none-eabi. Ok for trunk? Thanks, Kyrill gcc/ChangeLog 2012-11-29 Kyrylo Tkachov * config/arm/arm.c (neon_itype): Define NEON_RINT enum element. (neon_builtin_data): Register vrintn, vrinta, vrintp, vrintm, vrintz, vrintx neon builtins. (arm_init_neon_builtins): Handle NEON_RINT. (arm_expand_neon_builtin): Likewise. * config/arm/unspecs.md: New file. * config/arm/arm.md ("unspec"): Move to unspecs.md. * config/arm/iterators.md (NEON_VRINT): New int iterator. (nvrint_variant): New int attribute. * config/arm/neon.md (neon_vrint): New pattern. ("unspec"): Move to unspecs.md. * config/arm/iwmmxt2.md ("unspec"): Move to unspecs.md. \ No newline at end of file diff --git a/gcc/config/arm/arm.c b/gcc/config/arm/arm.c index 50dcff5..49feac9 100644 --- a/gcc/config/arm/arm.c +++ b/gcc/config/arm/arm.c @@ -19002,6 +19002,7 @@ typedef enum { NEON_GETLANE, NEON_SETLANE, NEON_CREATE, + NEON_RINT, NEON_DUP, NEON_DUPLANE, NEON_COMBINE, @@ -19201,6 +19202,12 @@ static neon_builtin_datum neon_builtin_data[] = VAR4 (FIXCONV, vcvt_n, v2si, v2sf, v4si, v4sf), VAR10 (SELECT, vbsl, v8qi, v4hi, v2si, v2sf, di, v16qi, v8hi, v4si, v4sf, v2di), + VAR2 (RINT, vrintn, v2sf, v4sf), + VAR2 (RINT, vrinta, v2sf, v4sf), + VAR2 (RINT, vrintp, v2sf, v4sf), + VAR2 (RINT, vrintm, v2sf, v4sf), + VAR2 (RINT, vrintz, v2sf, v4sf), + VAR2 (RINT, vrintx, v2sf, v4sf), VAR1 (VTBL, vtbl1, v8qi), VAR1 (VTBL, vtbl2, v8qi), VAR1 (VTBL, vtbl3, v8qi), @@ -19828,6 +19835,7 @@ arm_init_neon_builtins (void) is_store = 1; /* Fall through. */ case NEON_UNOP: + case NEON_RINT: case NEON_BINOP: case NEON_LOGICBINOP: case NEON_SHIFTINSERT: @@ -21015,6 +21023,7 @@ arm_expand_neon_builtin (int fcode, tree exp, rtx target) NEON_ARG_COPY_TO_REG, NEON_ARG_STOP); case NEON_DUP: + case NEON_RINT: case NEON_SPLIT: case NEON_REINTERP: return arm_expand_neon_args (target, icode, 1, type_mode, exp, fcode, diff --git a/gcc/config/arm/arm.md b/gcc/config/arm/arm.md index cff1148..c2328cc 100644 --- a/gcc/config/arm/arm.md +++ b/gcc/config/arm/arm.md @@ -58,112 +58,6 @@ ] ) -;; UNSPEC Usage: -;; Note: sin and cos are no-longer used. -;; Unspec enumerators for Neon are defined in neon.md. -;; Unspec enumerators for iwmmxt2 are defined in iwmmxt2.md - -(define_c_enum "unspec" [ - UNSPEC_PUSH_MULT ; `push multiple' operation: - ; operand 0 is the first register, - ; subsequent registers are in parallel (use ...) - ; expressions. - UNSPEC_PIC_SYM ; A symbol that has been treated properly for pic - ; usage, that is, we will add the pic_register - ; value to it before trying to dereference it. - UNSPEC_PIC_BASE ; Add PC and all but the last operand together, - ; The last operand is the number of a PIC_LABEL - ; that points at the containing instruction. - UNSPEC_PRLG_STK ; A special barrier that prevents frame accesses - ; being scheduled before the stack adjustment insn. - UNSPEC_REGISTER_USE ; As USE insns are not meaningful after reload, - ; this unspec is used to prevent the deletion of - ; instructions setting registers for EH handling - ; and stack frame generation. Operand 0 is the - ; register to "use". - UNSPEC_CHECK_ARCH ; Set CCs to indicate 26-bit or 32-bit mode. - UNSPEC_WSHUFH ; Used by the intrinsic form of the iWMMXt WSHUFH instruction. - UNSPEC_WACC ; Used by the intrinsic form of the iWMMXt WACC instruction. - UNSPEC_TMOVMSK ; Used by the intrinsic form of the iWMMXt TMOVMSK instruction. - UNSPEC_WSAD ; Used by the intrinsic form of the iWMMXt WSAD instruction. - UNSPEC_WSADZ ; Used by the intrinsic form of the iWMMXt WSADZ instruction. - UNSPEC_WMACS ; Used by the intrinsic form of the iWMMXt WMACS instruction. - UNSPEC_WMACU ; Used by the intrinsic form of the iWMMXt WMACU instruction. - UNSPEC_WMACSZ ; Used by the intrinsic form of the iWMMXt WMACSZ instruction. - UNSPEC_WMACUZ ; Used by the intrinsic form of the iWMMXt WMACUZ instruction. - UNSPEC_CLRDI ; Used by the intrinsic form of the iWMMXt CLRDI instruction. - UNSPEC_WALIGNI ; Used by the intrinsic form of the iWMMXt WALIGN instruction. - UNSPEC_TLS ; A symbol that has been treated properly for TLS usage. - UNSPEC_PIC_LABEL ; A label used for PIC access that does not appear in the - ; instruction stream. - UNSPEC_PIC_OFFSET ; A symbolic 12-bit OFFSET that has been treated - ; correctly for PIC usage. - UNSPEC_GOTSYM_OFF ; The offset of the start of the GOT from a - ; a given symbolic address. - UNSPEC_THUMB1_CASESI ; A Thumb1 compressed dispatch-table call. - UNSPEC_RBIT ; rbit operation. - UNSPEC_SYMBOL_OFFSET ; The offset of the start of the symbol from - ; another symbolic address. - UNSPEC_MEMORY_BARRIER ; Represent a memory barrier. - UNSPEC_UNALIGNED_LOAD ; Used to represent ldr/ldrh instructions that access - ; unaligned locations, on architectures which support - ; that. - UNSPEC_UNALIGNED_STORE ; Same for str/strh. - UNSPEC_PIC_UNIFIED ; Create a common pic addressing form. - UNSPEC_LL ; Represent an unpaired load-register-exclusive. - UNSPEC_VRINTZ ; Represent a float to integral float rounding - ; towards zero. - UNSPEC_VRINTP ; Represent a float to integral float rounding - ; towards +Inf. - UNSPEC_VRINTM ; Represent a float to integral float rounding - ; towards -Inf. - UNSPEC_VRINTR ; Represent a float to integral float rounding - ; FPSCR rounding mode. - UNSPEC_VRINTX ; Represent a float to integral float rounding - ; FPSCR rounding mode and signal inexactness. - UNSPEC_VRINTA ; Represent a float to integral float rounding - ; towards nearest, ties away from zero. -]) - -;; UNSPEC_VOLATILE Usage: - -(define_c_enum "unspecv" [ - VUNSPEC_BLOCKAGE ; `blockage' insn to prevent scheduling across an - ; insn in the code. - VUNSPEC_EPILOGUE ; `epilogue' insn, used to represent any part of the - ; instruction epilogue sequence that isn't expanded - ; into normal RTL. Used for both normal and sibcall - ; epilogues. - VUNSPEC_THUMB1_INTERWORK ; `prologue_thumb1_interwork' insn, used to swap - ; modes from arm to thumb. - VUNSPEC_ALIGN ; `align' insn. Used at the head of a minipool table - ; for inlined constants. - VUNSPEC_POOL_END ; `end-of-table'. Used to mark the end of a minipool - ; table. - VUNSPEC_POOL_1 ; `pool-entry(1)'. An entry in the constant pool for - ; an 8-bit object. - VUNSPEC_POOL_2 ; `pool-entry(2)'. An entry in the constant pool for - ; a 16-bit object. - VUNSPEC_POOL_4 ; `pool-entry(4)'. An entry in the constant pool for - ; a 32-bit object. - VUNSPEC_POOL_8 ; `pool-entry(8)'. An entry in the constant pool for - ; a 64-bit object. - VUNSPEC_POOL_16 ; `pool-entry(16)'. An entry in the constant pool for - ; a 128-bit object. - VUNSPEC_TMRC ; Used by the iWMMXt TMRC instruction. - VUNSPEC_TMCR ; Used by the iWMMXt TMCR instruction. - VUNSPEC_ALIGN8 ; 8-byte alignment version of VUNSPEC_ALIGN - VUNSPEC_WCMP_EQ ; Used by the iWMMXt WCMPEQ instructions - VUNSPEC_WCMP_GTU ; Used by the iWMMXt WCMPGTU instructions - VUNSPEC_WCMP_GT ; Used by the iwMMXT WCMPGT instructions - VUNSPEC_EH_RETURN ; Use to override the return address for exception - ; handling. - VUNSPEC_ATOMIC_CAS ; Represent an atomic compare swap. - VUNSPEC_ATOMIC_XCHG ; Represent an atomic exchange. - VUNSPEC_ATOMIC_OP ; Represent an atomic operation. - VUNSPEC_LL ; Represent a load-register-exclusive. - VUNSPEC_SC ; Represent a store-register-exclusive. -]) ;;--------------------------------------------------------------------------- ;; Attributes @@ -564,6 +458,11 @@ (define_attr "ce_count" "" (const_int 1)) ;;--------------------------------------------------------------------------- +;; Unspecs + +(include "unspecs.md") + +;;--------------------------------------------------------------------------- ;; Mode iterators (include "iterators.md") diff --git a/gcc/config/arm/iterators.md b/gcc/config/arm/iterators.md index fe5eb52..5ae1aef 100644 --- a/gcc/config/arm/iterators.md +++ b/gcc/config/arm/iterators.md @@ -198,6 +198,9 @@ (define_int_iterator VRINT [UNSPEC_VRINTZ UNSPEC_VRINTP UNSPEC_VRINTM UNSPEC_VRINTR UNSPEC_VRINTX UNSPEC_VRINTA]) +(define_int_iterator NEON_VRINT [UNSPEC_NVRINTP UNSPEC_NVRINTZ UNSPEC_NVRINTM + UNSPEC_NVRINTX UNSPEC_NVRINTA UNSPEC_NVRINTN]) + ;;---------------------------------------------------------------------------- ;; Mode attributes ;;---------------------------------------------------------------------------- @@ -483,3 +486,7 @@ (define_int_attr vrint_predicable [(UNSPEC_VRINTZ "yes") (UNSPEC_VRINTP "no") (UNSPEC_VRINTA "no") (UNSPEC_VRINTM "no") (UNSPEC_VRINTR "yes") (UNSPEC_VRINTX "yes")]) + +(define_int_attr nvrint_variant [(UNSPEC_NVRINTZ "z") (UNSPEC_NVRINTP "p") + (UNSPEC_NVRINTA "a") (UNSPEC_NVRINTM "m") + (UNSPEC_NVRINTX "x") (UNSPEC_NVRINTN "n")]) diff --git a/gcc/config/arm/iwmmxt2.md b/gcc/config/arm/iwmmxt2.md index c06fece..61628bc 100644 --- a/gcc/config/arm/iwmmxt2.md +++ b/gcc/config/arm/iwmmxt2.md @@ -18,21 +18,6 @@ ;; along with GCC; see the file COPYING3. If not see ;; . -(define_c_enum "unspec" [ - UNSPEC_WADDC ; Used by the intrinsic form of the iWMMXt WADDC instruction. - UNSPEC_WABS ; Used by the intrinsic form of the iWMMXt WABS instruction. - UNSPEC_WQMULWMR ; Used by the intrinsic form of the iWMMXt WQMULWMR instruction. - UNSPEC_WQMULMR ; Used by the intrinsic form of the iWMMXt WQMULMR instruction. - UNSPEC_WQMULWM ; Used by the intrinsic form of the iWMMXt WQMULWM instruction. - UNSPEC_WQMULM ; Used by the intrinsic form of the iWMMXt WQMULM instruction. - UNSPEC_WQMIAxyn ; Used by the intrinsic form of the iWMMXt WMIAxyn instruction. - UNSPEC_WQMIAxy ; Used by the intrinsic form of the iWMMXt WMIAxy instruction. - UNSPEC_TANDC ; Used by the intrinsic form of the iWMMXt TANDC instruction. - UNSPEC_TORC ; Used by the intrinsic form of the iWMMXt TORC instruction. - UNSPEC_TORVSC ; Used by the intrinsic form of the iWMMXt TORVSC instruction. - UNSPEC_TEXTRC ; Used by the intrinsic form of the iWMMXt TEXTRC instruction. -]) - (define_insn "iwmmxt_wabs3" [(set (match_operand:VMMX 0 "register_operand" "=y") (unspec:VMMX [(match_operand:VMMX 1 "register_operand" "y")] UNSPEC_WABS))] diff --git a/gcc/config/arm/neon.md b/gcc/config/arm/neon.md index 2103580..00b806b 100644 --- a/gcc/config/arm/neon.md +++ b/gcc/config/arm/neon.md @@ -19,137 +19,6 @@ ;; along with GCC; see the file COPYING3. If not see ;; . -;; Enumerators for unspecs. -(define_c_enum "unspec" [ - UNSPEC_ASHIFT_SIGNED - UNSPEC_ASHIFT_UNSIGNED - UNSPEC_LOAD_COUNT - UNSPEC_VABD - UNSPEC_VABDL - UNSPEC_VADD - UNSPEC_VADDHN - UNSPEC_VADDL - UNSPEC_VADDW - UNSPEC_VBSL - UNSPEC_VCAGE - UNSPEC_VCAGT - UNSPEC_VCEQ - UNSPEC_VCGE - UNSPEC_VCGEU - UNSPEC_VCGT - UNSPEC_VCGTU - UNSPEC_VCLS - UNSPEC_VCONCAT - UNSPEC_VCVT - UNSPEC_VCVT_N - UNSPEC_VEXT - UNSPEC_VHADD - UNSPEC_VHSUB - UNSPEC_VLD1 - UNSPEC_VLD1_LANE - UNSPEC_VLD2 - UNSPEC_VLD2_DUP - UNSPEC_VLD2_LANE - UNSPEC_VLD3 - UNSPEC_VLD3A - UNSPEC_VLD3B - UNSPEC_VLD3_DUP - UNSPEC_VLD3_LANE - UNSPEC_VLD4 - UNSPEC_VLD4A - UNSPEC_VLD4B - UNSPEC_VLD4_DUP - UNSPEC_VLD4_LANE - UNSPEC_VMAX - UNSPEC_VMIN - UNSPEC_VMLA - UNSPEC_VMLAL - UNSPEC_VMLA_LANE - UNSPEC_VMLAL_LANE - UNSPEC_VMLS - UNSPEC_VMLSL - UNSPEC_VMLS_LANE - UNSPEC_VMLSL_LANE - UNSPEC_VMOVL - UNSPEC_VMOVN - UNSPEC_VMUL - UNSPEC_VMULL - UNSPEC_VMUL_LANE - UNSPEC_VMULL_LANE - UNSPEC_VPADAL - UNSPEC_VPADD - UNSPEC_VPADDL - UNSPEC_VPMAX - UNSPEC_VPMIN - UNSPEC_VPSMAX - UNSPEC_VPSMIN - UNSPEC_VPUMAX - UNSPEC_VPUMIN - UNSPEC_VQABS - UNSPEC_VQADD - UNSPEC_VQDMLAL - UNSPEC_VQDMLAL_LANE - UNSPEC_VQDMLSL - UNSPEC_VQDMLSL_LANE - UNSPEC_VQDMULH - UNSPEC_VQDMULH_LANE - UNSPEC_VQDMULL - UNSPEC_VQDMULL_LANE - UNSPEC_VQMOVN - UNSPEC_VQMOVUN - UNSPEC_VQNEG - UNSPEC_VQSHL - UNSPEC_VQSHL_N - UNSPEC_VQSHLU_N - UNSPEC_VQSHRN_N - UNSPEC_VQSHRUN_N - UNSPEC_VQSUB - UNSPEC_VRECPE - UNSPEC_VRECPS - UNSPEC_VREV16 - UNSPEC_VREV32 - UNSPEC_VREV64 - UNSPEC_VRSQRTE - UNSPEC_VRSQRTS - UNSPEC_VSHL - UNSPEC_VSHLL_N - UNSPEC_VSHL_N - UNSPEC_VSHR_N - UNSPEC_VSHRN_N - UNSPEC_VSLI - UNSPEC_VSRA_N - UNSPEC_VSRI - UNSPEC_VST1 - UNSPEC_VST1_LANE - UNSPEC_VST2 - UNSPEC_VST2_LANE - UNSPEC_VST3 - UNSPEC_VST3A - UNSPEC_VST3B - UNSPEC_VST3_LANE - UNSPEC_VST4 - UNSPEC_VST4A - UNSPEC_VST4B - UNSPEC_VST4_LANE - UNSPEC_VSTRUCTDUMMY - UNSPEC_VSUB - UNSPEC_VSUBHN - UNSPEC_VSUBL - UNSPEC_VSUBW - UNSPEC_VTBL - UNSPEC_VTBX - UNSPEC_VTRN1 - UNSPEC_VTRN2 - UNSPEC_VTST - UNSPEC_VUZP1 - UNSPEC_VUZP2 - UNSPEC_VZIP1 - UNSPEC_VZIP2 - UNSPEC_MISALIGNED_ACCESS - UNSPEC_VCLE - UNSPEC_VCLT -]) - ;; Attribute used to permit string comparisons against in ;; neon_type attribute definitions. @@ -779,6 +648,19 @@ (const_string "neon_fp_vmla_qqq")))] ) +(define_insn "neon_vrint" + [(set (match_operand:VCVTF 0 "s_register_operand" "=w") + (unspec:VCVTF [(match_operand:VCVTF 1 + "s_register_operand" "w")] + NEON_VRINT))] + "TARGET_NEON && TARGET_FPU_ARMV8" + "vrint%?.f32\\t%0, %1" + [(set (attr "neon_type") + (if_then_else (match_test "") + (const_string "neon_fp_vadd_ddd_vabs_dd") + (const_string "neon_fp_vadd_qqq_vabs_qq")))] +) + (define_insn "ior3" [(set (match_operand:VDQ 0 "s_register_operand" "=w,w") (ior:VDQ (match_operand:VDQ 1 "s_register_operand" "w,0") diff --git a/gcc/config/arm/unspecs.md b/gcc/config/arm/unspecs.md new file mode 100644 index 0000000..a530e6d --- /dev/null +++ b/gcc/config/arm/unspecs.md @@ -0,0 +1,259 @@ +;; UNSPEC Usage: +;; Note: sin and cos are no-longer used. +;; Unspec enumerators for Neon are defined in neon.md. +;; Unspec enumerators for iwmmxt2 are defined in iwmmxt2.md + +(define_c_enum "unspec" [ + UNSPEC_PUSH_MULT ; `push multiple' operation: + ; operand 0 is the first register, + ; subsequent registers are in parallel (use ...) + ; expressions. + UNSPEC_PIC_SYM ; A symbol that has been treated properly for pic + ; usage, that is, we will add the pic_register + ; value to it before trying to dereference it. + UNSPEC_PIC_BASE ; Add PC and all but the last operand together, + ; The last operand is the number of a PIC_LABEL + ; that points at the containing instruction. + UNSPEC_PRLG_STK ; A special barrier that prevents frame accesses + ; being scheduled before the stack adjustment insn. + UNSPEC_REGISTER_USE ; As USE insns are not meaningful after reload, + ; this unspec is used to prevent the deletion of + ; instructions setting registers for EH handling + ; and stack frame generation. Operand 0 is the + ; register to "use". + UNSPEC_CHECK_ARCH ; Set CCs to indicate 26-bit or 32-bit mode. + UNSPEC_WSHUFH ; Used by the intrinsic form of the iWMMXt WSHUFH instruction. + UNSPEC_WACC ; Used by the intrinsic form of the iWMMXt WACC instruction. + UNSPEC_TMOVMSK ; Used by the intrinsic form of the iWMMXt TMOVMSK instruction. + UNSPEC_WSAD ; Used by the intrinsic form of the iWMMXt WSAD instruction. + UNSPEC_WSADZ ; Used by the intrinsic form of the iWMMXt WSADZ instruction. + UNSPEC_WMACS ; Used by the intrinsic form of the iWMMXt WMACS instruction. + UNSPEC_WMACU ; Used by the intrinsic form of the iWMMXt WMACU instruction. + UNSPEC_WMACSZ ; Used by the intrinsic form of the iWMMXt WMACSZ instruction. + UNSPEC_WMACUZ ; Used by the intrinsic form of the iWMMXt WMACUZ instruction. + UNSPEC_CLRDI ; Used by the intrinsic form of the iWMMXt CLRDI instruction. + UNSPEC_WALIGNI ; Used by the intrinsic form of the iWMMXt WALIGN instruction. + UNSPEC_TLS ; A symbol that has been treated properly for TLS usage. + UNSPEC_PIC_LABEL ; A label used for PIC access that does not appear in the + ; instruction stream. + UNSPEC_PIC_OFFSET ; A symbolic 12-bit OFFSET that has been treated + ; correctly for PIC usage. + UNSPEC_GOTSYM_OFF ; The offset of the start of the GOT from a + ; a given symbolic address. + UNSPEC_THUMB1_CASESI ; A Thumb1 compressed dispatch-table call. + UNSPEC_RBIT ; rbit operation. + UNSPEC_SYMBOL_OFFSET ; The offset of the start of the symbol from + ; another symbolic address. + UNSPEC_MEMORY_BARRIER ; Represent a memory barrier. + UNSPEC_UNALIGNED_LOAD ; Used to represent ldr/ldrh instructions that access + ; unaligned locations, on architectures which support + ; that. + UNSPEC_UNALIGNED_STORE ; Same for str/strh. + UNSPEC_PIC_UNIFIED ; Create a common pic addressing form. + UNSPEC_LL ; Represent an unpaired load-register-exclusive. + UNSPEC_VRINTZ ; Represent a float to integral float rounding + ; towards zero. + UNSPEC_VRINTP ; Represent a float to integral float rounding + ; towards +Inf. + UNSPEC_VRINTM ; Represent a float to integral float rounding + ; towards -Inf. + UNSPEC_VRINTR ; Represent a float to integral float rounding + ; FPSCR rounding mode. + UNSPEC_VRINTX ; Represent a float to integral float rounding + ; FPSCR rounding mode and signal inexactness. + UNSPEC_VRINTA ; Represent a float to integral float rounding + ; towards nearest, ties away from zero. +]) + +(define_c_enum "unspec" [ + UNSPEC_WADDC ; Used by the intrinsic form of the iWMMXt WADDC instruction. + UNSPEC_WABS ; Used by the intrinsic form of the iWMMXt WABS instruction. + UNSPEC_WQMULWMR ; Used by the intrinsic form of the iWMMXt WQMULWMR instruction. + UNSPEC_WQMULMR ; Used by the intrinsic form of the iWMMXt WQMULMR instruction. + UNSPEC_WQMULWM ; Used by the intrinsic form of the iWMMXt WQMULWM instruction. + UNSPEC_WQMULM ; Used by the intrinsic form of the iWMMXt WQMULM instruction. + UNSPEC_WQMIAxyn ; Used by the intrinsic form of the iWMMXt WMIAxyn instruction. + UNSPEC_WQMIAxy ; Used by the intrinsic form of the iWMMXt WMIAxy instruction. + UNSPEC_TANDC ; Used by the intrinsic form of the iWMMXt TANDC instruction. + UNSPEC_TORC ; Used by the intrinsic form of the iWMMXt TORC instruction. + UNSPEC_TORVSC ; Used by the intrinsic form of the iWMMXt TORVSC instruction. + UNSPEC_TEXTRC ; Used by the intrinsic form of the iWMMXt TEXTRC instruction. +]) + + +;; UNSPEC_VOLATILE Usage: + +(define_c_enum "unspecv" [ + VUNSPEC_BLOCKAGE ; `blockage' insn to prevent scheduling across an + ; insn in the code. + VUNSPEC_EPILOGUE ; `epilogue' insn, used to represent any part of the + ; instruction epilogue sequence that isn't expanded + ; into normal RTL. Used for both normal and sibcall + ; epilogues. + VUNSPEC_THUMB1_INTERWORK ; `prologue_thumb1_interwork' insn, used to swap + ; modes from arm to thumb. + VUNSPEC_ALIGN ; `align' insn. Used at the head of a minipool table + ; for inlined constants. + VUNSPEC_POOL_END ; `end-of-table'. Used to mark the end of a minipool + ; table. + VUNSPEC_POOL_1 ; `pool-entry(1)'. An entry in the constant pool for + ; an 8-bit object. + VUNSPEC_POOL_2 ; `pool-entry(2)'. An entry in the constant pool for + ; a 16-bit object. + VUNSPEC_POOL_4 ; `pool-entry(4)'. An entry in the constant pool for + ; a 32-bit object. + VUNSPEC_POOL_8 ; `pool-entry(8)'. An entry in the constant pool for + ; a 64-bit object. + VUNSPEC_POOL_16 ; `pool-entry(16)'. An entry in the constant pool for + ; a 128-bit object. + VUNSPEC_TMRC ; Used by the iWMMXt TMRC instruction. + VUNSPEC_TMCR ; Used by the iWMMXt TMCR instruction. + VUNSPEC_ALIGN8 ; 8-byte alignment version of VUNSPEC_ALIGN + VUNSPEC_WCMP_EQ ; Used by the iWMMXt WCMPEQ instructions + VUNSPEC_WCMP_GTU ; Used by the iWMMXt WCMPGTU instructions + VUNSPEC_WCMP_GT ; Used by the iwMMXT WCMPGT instructions + VUNSPEC_EH_RETURN ; Use to override the return address for exception + ; handling. + VUNSPEC_ATOMIC_CAS ; Represent an atomic compare swap. + VUNSPEC_ATOMIC_XCHG ; Represent an atomic exchange. + VUNSPEC_ATOMIC_OP ; Represent an atomic operation. + VUNSPEC_LL ; Represent a load-register-exclusive. + VUNSPEC_SC ; Represent a store-register-exclusive. +]) + +;; Enumerators for NEON unspecs. +(define_c_enum "unspec" [ + UNSPEC_ASHIFT_SIGNED + UNSPEC_ASHIFT_UNSIGNED + UNSPEC_LOAD_COUNT + UNSPEC_VABD + UNSPEC_VABDL + UNSPEC_VADD + UNSPEC_VADDHN + UNSPEC_VADDL + UNSPEC_VADDW + UNSPEC_VBSL + UNSPEC_VCAGE + UNSPEC_VCAGT + UNSPEC_VCEQ + UNSPEC_VCGE + UNSPEC_VCGEU + UNSPEC_VCGT + UNSPEC_VCGTU + UNSPEC_VCLS + UNSPEC_VCONCAT + UNSPEC_VCVT + UNSPEC_VCVT_N + UNSPEC_VEXT + UNSPEC_VHADD + UNSPEC_VHSUB + UNSPEC_VLD1 + UNSPEC_VLD1_LANE + UNSPEC_VLD2 + UNSPEC_VLD2_DUP + UNSPEC_VLD2_LANE + UNSPEC_VLD3 + UNSPEC_VLD3A + UNSPEC_VLD3B + UNSPEC_VLD3_DUP + UNSPEC_VLD3_LANE + UNSPEC_VLD4 + UNSPEC_VLD4A + UNSPEC_VLD4B + UNSPEC_VLD4_DUP + UNSPEC_VLD4_LANE + UNSPEC_VMAX + UNSPEC_VMIN + UNSPEC_VMLA + UNSPEC_VMLAL + UNSPEC_VMLA_LANE + UNSPEC_VMLAL_LANE + UNSPEC_VMLS + UNSPEC_VMLSL + UNSPEC_VMLS_LANE + UNSPEC_VMLSL_LANE + UNSPEC_VMOVL + UNSPEC_VMOVN + UNSPEC_VMUL + UNSPEC_VMULL + UNSPEC_VMUL_LANE + UNSPEC_VMULL_LANE + UNSPEC_VPADAL + UNSPEC_VPADD + UNSPEC_VPADDL + UNSPEC_VPMAX + UNSPEC_VPMIN + UNSPEC_VPSMAX + UNSPEC_VPSMIN + UNSPEC_VPUMAX + UNSPEC_VPUMIN + UNSPEC_VQABS + UNSPEC_VQADD + UNSPEC_VQDMLAL + UNSPEC_VQDMLAL_LANE + UNSPEC_VQDMLSL + UNSPEC_VQDMLSL_LANE + UNSPEC_VQDMULH + UNSPEC_VQDMULH_LANE + UNSPEC_VQDMULL + UNSPEC_VQDMULL_LANE + UNSPEC_VQMOVN + UNSPEC_VQMOVUN + UNSPEC_VQNEG + UNSPEC_VQSHL + UNSPEC_VQSHL_N + UNSPEC_VQSHLU_N + UNSPEC_VQSHRN_N + UNSPEC_VQSHRUN_N + UNSPEC_VQSUB + UNSPEC_VRECPE + UNSPEC_VRECPS + UNSPEC_VREV16 + UNSPEC_VREV32 + UNSPEC_VREV64 + UNSPEC_VRSQRTE + UNSPEC_VRSQRTS + UNSPEC_VSHL + UNSPEC_VSHLL_N + UNSPEC_VSHL_N + UNSPEC_VSHR_N + UNSPEC_VSHRN_N + UNSPEC_VSLI + UNSPEC_VSRA_N + UNSPEC_VSRI + UNSPEC_VST1 + UNSPEC_VST1_LANE + UNSPEC_VST2 + UNSPEC_VST2_LANE + UNSPEC_VST3 + UNSPEC_VST3A + UNSPEC_VST3B + UNSPEC_VST3_LANE + UNSPEC_VST4 + UNSPEC_VST4A + UNSPEC_VST4B + UNSPEC_VST4_LANE + UNSPEC_VSTRUCTDUMMY + UNSPEC_VSUB + UNSPEC_VSUBHN + UNSPEC_VSUBL + UNSPEC_VSUBW + UNSPEC_VTBL + UNSPEC_VTBX + UNSPEC_VTRN1 + UNSPEC_VTRN2 + UNSPEC_VTST + UNSPEC_VUZP1 + UNSPEC_VUZP2 + UNSPEC_VZIP1 + UNSPEC_VZIP2 + UNSPEC_MISALIGNED_ACCESS + UNSPEC_VCLE + UNSPEC_VCLT + UNSPEC_NVRINTZ + UNSPEC_NVRINTP + UNSPEC_NVRINTM + UNSPEC_NVRINTX + UNSPEC_NVRINTA + UNSPEC_NVRINTN +])