@@ -148,7 +148,7 @@ extern int arm_address_offset_is_imm (rtx);
extern const char *output_add_immediate (rtx *);
extern const char *arithmetic_instr (rtx, int);
extern void output_ascii_pseudo_op (FILE *, const unsigned char *, int);
-extern const char *output_return_instruction (rtx, int, int);
+extern const char *output_return_instruction (rtx, int, int, int);
extern void arm_poke_function_name (FILE *, const char *);
extern void arm_final_prescan_insn (rtx);
extern int arm_debugger_arg_offset (int, rtx);
@@ -15592,9 +15592,11 @@ arm_get_vfp_saved_size (void)
/* Generate a function exit sequence. If REALLY_RETURN is false, then do
- everything bar the final return instruction. */
+ everything bar the final return instruction. If simple_return is true,
+ then do not output epilogue, because it has already been emitted in RTL. */
const char *
-output_return_instruction (rtx operand, int really_return, int reverse)
+output_return_instruction (rtx operand, int really_return, int reverse,
+ int simple_return)
{
char conditional[10];
char instr[100];
@@ -15637,7 +15639,7 @@ output_return_instruction (rtx operand, int really_return, int reverse)
offsets = arm_get_frame_offsets ();
live_regs_mask = offsets->saved_regs_mask;
- if (live_regs_mask)
+ if (!simple_return && live_regs_mask)
{
const char * return_reg;
@@ -15765,7 +15767,7 @@ output_return_instruction (rtx operand, int really_return, int reverse)
{
/* The return has already been handled
by loading the LR into the PC. */
- really_return = 0;
+ return "";
}
}
@@ -8597,7 +8597,7 @@
arm_ccfsm_state += 2;
return \"\";
}
- return output_return_instruction (const_true_rtx, TRUE, FALSE);
+ return output_return_instruction (const_true_rtx, TRUE, FALSE, FALSE);
}"
[(set_attr "type" "load1")
(set_attr "length" "12")
@@ -8618,7 +8618,7 @@
arm_ccfsm_state += 2;
return \"\";
}
- return output_return_instruction (operands[0], TRUE, FALSE);
+ return output_return_instruction (operands[0], TRUE, FALSE, FALSE);
}"
[(set_attr "conds" "use")
(set_attr "length" "12")
@@ -8639,13 +8639,30 @@
arm_ccfsm_state += 2;
return \"\";
}
- return output_return_instruction (operands[0], TRUE, TRUE);
+ return output_return_instruction (operands[0], TRUE, TRUE, FALSE);
}"
[(set_attr "conds" "use")
(set_attr "length" "12")
(set_attr "type" "load1")]
)
+(define_insn "*arm_simple_return"
+ [(simple_return)]
+ "TARGET_ARM"
+ "*
+ {
+ if (arm_ccfsm_state == 2)
+ {
+ arm_ccfsm_state += 2;
+ return \"\";
+ }
+ return output_return_instruction (const_true_rtx, TRUE, FALSE, TRUE);
+ }"
+ [(set_attr "type" "branch")
+ (set_attr "length" "4")
+ (set_attr "predicable" "yes")]
+)
+
;; Generate a sequence of instructions to determine if the processor is
;; in 26-bit or 32-bit mode, and return the appropriate return address
;; mask.
@@ -635,17 +635,12 @@
(set_attr "length" "20")]
)
-;; Note: this is not predicable, to avoid issues with linker-generated
-;; interworking stubs.
(define_insn "*thumb2_return"
- [(return)]
- "TARGET_THUMB2 && USE_RETURN_INSN (FALSE)"
- "*
- {
- return output_return_instruction (const_true_rtx, TRUE, FALSE);
- }"
- [(set_attr "type" "load1")
- (set_attr "length" "12")]
+ [(simple_return)]
+ "TARGET_THUMB2"
+ "* return output_return_instruction (const_true_rtx, TRUE, FALSE, TRUE);"
+ [(set_attr "type" "branch")
+ (set_attr "length" "4")]
)
(define_insn_and_split "thumb2_eh_return"