Message ID | 000501d3aa44$69a44e30$3cecea90$@renesas.com |
---|---|
State | New |
Headers | show |
Series | RL78 one_cmplhi2 improvement | expand |
HI DJ, > One thing to try is to use (subreg:QI in a define_expand, so that > there's a one_cmplhi2 pattern that expands to two QImode insns that > operate on HImode input/outputs via SUBREGs. Thank you for the suggestion! After several attempts the following is the only successful one, however the code produced is identical with and without the patch: (define_expand "one_cmplhi2" [(set (subreg:QI (match_operand:HI 0 "nonimmediate_operand") 0) (xor:HI (subreg:QI (match_operand:HI 1 "general_operand") 0) (const_int -1))) (set (subreg:QI (match_dup 0) 1) (xor:HI (subreg:QI (match_dup 1) 1) (const_int -1))) ] "" "DONE;" ) Is this similar to what you had in mind? Output code (same as before the patch ... the patch makes no difference): _test_one_cmplhi: mov a, [sp+4] xor a, #-1 mov r8, a mov a, [sp+5] xor a, #-1 mov r9, a ret I also explored other options including define_split without any success. > If it doesn't work out, consider this patch approved, though. Can I checkin now? Best Regards, Sebastian > -----Original Message----- > From: DJ Delorie [mailto:dj@redhat.com] > Sent: 20 February 2018 19:39 > To: Sebastian Perta <Sebastian.Perta@renesas.com> > Cc: gcc-patches@gcc.gnu.org > Subject: Re: [PATCH] RL78 one_cmplhi2 improvement > > > Const type promotion is the bane of embedded developers... > > One thing to try is to use (subreg:QI in a define_expand, so that > there's a one_cmplhi2 pattern that expands to two QImode insns that > operate on HImode input/outputs via SUBREGs. > > I don't have high hopes of gcc optimizing this properly in all cases, > but it's worth trying. > > If it doesn't work out, consider this patch approved, though. > > Thanks!
Index: rl78-expand.md =================================================================== --- rl78-expand.md (revision 257806) +++ rl78-expand.md (working copy) @@ -211,6 +211,16 @@ DONE;" ) +(define_expand "one_cmplhi2" + [(set (match_operand:HI 0 "nonimmediate_operand") + (xor:HI (match_operand:HI 1 "general_operand") + (const_int -1))) + ] + "" + "if (rl78_force_nonfar_2 (operands, gen_one_cmplhi2)) + DONE;" +) + ;;---------- Shifts ------------------------ (define_expand "ashl<mode>3" Index: rl78-real.md =================================================================== --- rl78-real.md (revision 257806) +++ rl78-real.md (working copy) @@ -240,6 +240,16 @@ [(set (attr "update_Z") (const_string "update_Z"))] ) +(define_insn "*one_cmplhi2_real" + [(set (match_operand:HI 0 "register_operand" "=A") + (xor:HI (match_operand:HI 1 "general_operand" "0") + (const_int -1))) + ] + "rl78_real_insns_ok ()" + "xor a, #-1 \;xor 0xFFEF8, #-1 ;one_cmplhi2 %0, %1" + [(set_attr "update_Z" "clobber")] +) + ;;---------- Shifts ------------------------ (define_insn "*ashlqi3_real" Index: rl78-virt.md =================================================================== --- rl78-virt.md (revision 257806) +++ rl78-virt.md (working copy) @@ -165,6 +165,16 @@ "v.xor\t%0, %1, %2" ) +(define_insn "*one_cmplhi2_virt" + [(set (match_operand:HI 0 "rl78_nonfar_nonimm_operand" "=v") + (xor:HI (match_operand:HI 1 "general_operand" "ivU") + (const_int -1))) + ] + "rl78_virt_insns_ok ()" + "v.one_cmplhi2\t%0, %1" + [(set_attr "valloc" "op1")] +) + ;;---------- Shifts ------------------------ (define_insn "*ashl<mode>3_virt"