| Message ID | 000001ce8816$a18159b0$e4840d10$@arm.com |
|---|---|
| State | New |
| Headers | show |
On 24/07/13 03:36, Terry Guo wrote: > Hi there, > > This patch intends to update thumb1_size_rtx_costs function to correctly > handle those RTXs defined by RTL expansion pass. Thus the GIMPLE > multiplication will be expanded to single mul instruction instead of a bunch > of shift/add/sub instructions which are in fact more expensive. > > Tested with GCC regression test on QEMU ARM926, no regression. Is it OK to > trunk and 4.8 branch? > > BR, > Terry > > > gcc/ChangeLog: > 2013-07-24 Terry Guo <terry.guo@arm.com> > > * config/arm/arm.c (thumb1_size_rtx_costs): Assign proper cost for > shift_add/shift_sub0/shift_sub1 RTXs. > > gcc/testsuite/ChangeLog: > 2013-07-24 Terry Guo <terry.guo@arm.com> > > * gcc.target/arm/thumb1-Os-mult.c: New test case. > > OK. I'll note for the record, though, that that function needs a major rewrite... R.
diff --git a/gcc/config/arm/arm.c b/gcc/config/arm/arm.c index e6fd420..5c07832 100644 --- a/gcc/config/arm/arm.c +++ b/gcc/config/arm/arm.c @@ -7925,6 +7925,15 @@ thumb1_size_rtx_costs (rtx x, enum rtx_code code, enum rtx_code outer) case PLUS: case MINUS: + /* Thumb-1 needs two instructions to fulfill shiftadd/shiftsub0/shiftsub1 + defined by RTL expansion, especially for the expansion of + multiplication. */ + if ((GET_CODE (XEXP (x, 0)) == MULT + && power_of_two_operand (XEXP (XEXP (x,0),1), SImode)) + || (GET_CODE (XEXP (x, 1)) == MULT + && power_of_two_operand (XEXP (XEXP (x, 1), 1), SImode))) + return COSTS_N_INSNS (2); + /* On purpose fall through for normal RTX. */ case COMPARE: case NEG: case NOT: diff --git a/gcc/testsuite/gcc.target/arm/thumb1-Os-mult.c b/gcc/testsuite/gcc.target/arm/thumb1-Os-mult.c new file mode 100644 index 0000000..31b8bd6 --- /dev/null +++ b/gcc/testsuite/gcc.target/arm/thumb1-Os-mult.c @@ -0,0 +1,12 @@ +/* { dg-require-effective-target arm_thumb1_ok } */ +/* { dg-do compile } */ +/* { dg-options "-Os" } */ +/* { dg-skip-if "" { ! { arm_thumb1 } } } */ + +int +mymul3 (int x) +{ + return x * 0x555; +} + +/* { dg-final { scan-assembler "mul\[\\t \]*r.,\[\\t \]*r." } } */
Hi there, This patch intends to update thumb1_size_rtx_costs function to correctly handle those RTXs defined by RTL expansion pass. Thus the GIMPLE multiplication will be expanded to single mul instruction instead of a bunch of shift/add/sub instructions which are in fact more expensive. Tested with GCC regression test on QEMU ARM926, no regression. Is it OK to trunk and 4.8 branch? BR, Terry gcc/ChangeLog: 2013-07-24 Terry Guo <terry.guo@arm.com> * config/arm/arm.c (thumb1_size_rtx_costs): Assign proper cost for shift_add/shift_sub0/shift_sub1 RTXs. gcc/testsuite/ChangeLog: 2013-07-24 Terry Guo <terry.guo@arm.com> * gcc.target/arm/thumb1-Os-mult.c: New test case.