Show patches with: Submitter = Christoph Müllner       |    Archived = No       |   37 patches
Patch Series A/F/R/T S/W/F Date Submitter Delegate State
[RFC] RISC-V: Add Zawrs ISA extension support [RFC] RISC-V: Add Zawrs ISA extension support - - - - --- 2022-06-01 Christoph Müllner New
[v3,9/9] RISC-V: Introduce predicate "riscv_sync_memory_operand" [PR 100266] Atomics improvements - - - - --- 2022-05-27 Christoph Müllner New
[v3,8/9] RISC-V: Add s.ext-consuming INSNs for LR and SC [PR 100266] Atomics improvements - - - - --- 2022-05-27 Christoph Müllner New
[v3,7/9] RISC-V: Model INSNs for LR and SC [PR 100266] Atomics improvements - - - - --- 2022-05-27 Christoph Müllner New
[v3,6/9] RISC-V: Implement atomic_{load,store} [PR 100265] Atomics improvements - - - - --- 2022-05-27 Christoph Müllner New
[v3,5/9] RISC-V: Emit fences according to chosen memory model [PR 100265] Atomics improvements - - - - --- 2022-05-27 Christoph Müllner New
[v3,4/9] RISC-V: Use STORE instead of AMOSWAP for atomic stores [PR 100265] Atomics improvements - - - - --- 2022-05-27 Christoph Müllner New
[v3,3/9] RISC-V: Eliminate %F specifier from riscv_print_operand() [PR 100265] Atomics improvements - - - - --- 2022-05-27 Christoph Müllner New
[v3,2/9] RISC-V: Emit proper memory ordering suffixes for AMOs [PR 100265] Atomics improvements - - - - --- 2022-05-27 Christoph Müllner New
[v3,1/9] RISC-V: Simplify memory model code [PR 100265] Atomics improvements - - - - --- 2022-05-27 Christoph Müllner New
RISC-V: Allow unaligned accesses in cpymemsi expansion RISC-V: Allow unaligned accesses in cpymemsi expansion - - - - --- 2021-07-29 Christoph Müllner New
[v2] RISC-V: Enable overlap-by-pieces in case of fast unaliged access [v2] RISC-V: Enable overlap-by-pieces in case of fast unaliged access - - - - --- 2021-07-22 Christoph Müllner New
RISC-V: Enable overlap-by-pieces in case of fast unaliged access RISC-V: Enable overlap-by-pieces in case of fast unaliged access - - - - --- 2021-07-22 Christoph Müllner New
RISC-V: Enable overlap-by-pieces via tune param RISC-V: Enable overlap-by-pieces via tune param - - - - --- 2021-07-21 Christoph Müllner New
[v2] REE: PR rtl-optimization/100264: Handle more PARALLEL SET expressions [v2] REE: PR rtl-optimization/100264: Handle more PARALLEL SET expressions - - - - --- 2021-05-10 Christoph Müllner New
[v2,10/10] RISC-V: Introduce predicate "riscv_sync_memory_operand" [PR 100266] Atomics improvements [PR100265/PR100266] - - - - --- 2021-05-05 Christoph Müllner New
[v2,09/10] RISC-V: Provide programmatic implementation of CAS [PR 100266] Atomics improvements [PR100265/PR100266] - - - - --- 2021-05-05 Christoph Müllner New
[v2,08/10] RISC-V: Add s.ext-consuming INSNs for LR and SC [PR 100266] Atomics improvements [PR100265/PR100266] - - - - --- 2021-05-05 Christoph Müllner New
[v2,07/10] RISC-V: Model INSNs for LR and SC [PR 100266] Atomics improvements [PR100265/PR100266] - - - - --- 2021-05-05 Christoph Müllner New
[v2,06/10] RISC-V: Implement atomic_{load,store} [PR 100265] Atomics improvements [PR100265/PR100266] - - - - --- 2021-05-05 Christoph Müllner New
[v2,05/10] RISC-V: Emit fences according to chosen memory model [PR 100265] Atomics improvements [PR100265/PR100266] - - - - --- 2021-05-05 Christoph Müllner New
[v2,04/10] RISC-V: Use STORE instead of AMOSWAP for atomic stores [PR 100265] Atomics improvements [PR100265/PR100266] - - - - --- 2021-05-05 Christoph Müllner New
[v2,03/10] RISC-V: Eliminate %F specifier from riscv_print_operand() [PR 100265] Atomics improvements [PR100265/PR100266] - - - - --- 2021-05-05 Christoph Müllner New
[v2,02/10] RISC-V: Emit proper memory ordering suffixes for AMOs [PR 100265] Atomics improvements [PR100265/PR100266] - - - - --- 2021-05-05 Christoph Müllner New
[v2,01/10] RISC-V: Simplify memory model code [PR 100265] Atomics improvements [PR100265/PR100266] - - - - --- 2021-05-05 Christoph Müllner New
RISC-V: Generate helpers for cbranch4 RISC-V: Generate helpers for cbranch4 - - - - --- 2021-05-05 Christoph Müllner New
[10/10] RISC-V: Provide programmatic implementation of CAS [PR 100266] Atomics improvements [PR100265/PR100266] - - - - --- 2021-04-26 Christoph Müllner New
[09/10] RISC-V: Generate helpers for cbranch4 [PR 100266] Atomics improvements [PR100265/PR100266] - - - - --- 2021-04-26 Christoph Müllner New
[08/10] RISC-V: Add s.ext-consuming INSNs for LR and SC [PR 100266] Atomics improvements [PR100265/PR100266] - - - - --- 2021-04-26 Christoph Müllner New
[07/10] RISC-V: Model INSNs for LR and SC [PR 100266] Atomics improvements [PR100265/PR100266] - - - - --- 2021-04-26 Christoph Müllner New
[06/10] RISC-V: Implement atomic_{load,store} [PR 100265] Atomics improvements [PR100265/PR100266] - - - - --- 2021-04-26 Christoph Müllner New
[05/10] RISC-V: Emit fences according to chosen memory model [PR 100265] Atomics improvements [PR100265/PR100266] - - - - --- 2021-04-26 Christoph Müllner New
[04/10] RISC-V: Don't use amoswap for atomic stores [PR 100265] Atomics improvements [PR100265/PR100266] - - - - --- 2021-04-26 Christoph Müllner New
[03/10] RISC-V: Eliminate %F specifier from riscv_print_operand() [PR 100265] Atomics improvements [PR100265/PR100266] - - - - --- 2021-04-26 Christoph Müllner New
[02/10] RISC-V: Emit proper memory ordering suffixes for AMOs [PR 100265] Atomics improvements [PR100265/PR100266] - - - - --- 2021-04-26 Christoph Müllner New
[01/10] RISC-V: Simplify memory model code [PR 100265] Atomics improvements [PR100265/PR100266] - - - - --- 2021-04-26 Christoph Müllner New
[1/2] REE: PR rtl-optimization/100264: Handle more PARALLEL SET expressions [1/2] REE: PR rtl-optimization/100264: Handle more PARALLEL SET expressions - - - - --- 2021-04-26 Christoph Müllner New