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Apply
«
1
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»
Patch
Series
A/F/R/T
S/W/F
Date
Submitter
Delegate
State
[RISC-V] Add support for AddressSanitizer on RISC-V GCC
[RISC-V] Add support for AddressSanitizer on RISC-V GCC
- - - -
-
-
-
2020-07-30
joshua
New
[RISC-V] Add support for AddressSanitizer on RISC-V GCC
[RISC-V] Add support for AddressSanitizer on RISC-V GCC
- - - -
-
-
-
2020-08-19
joshua
New
回复:[PATCH] Asan changes for RISC-V.
回复:[PATCH] Asan changes for RISC-V.
- - - -
-
-
-
2022-04-19
joshua
New
回复:[PATCH] Asan changes for RISC-V.
回复:[PATCH] Asan changes for RISC-V.
- - - -
-
-
-
2022-04-20
joshua
New
回复:[PATCH] Asan changes for RISC-V.
回复:[PATCH] Asan changes for RISC-V.
- - - -
-
-
-
2022-04-20
joshua
New
[1/9] RISC-V: minimal support for xtheadvector
RISC-V: Support XTheadVector extensions
- - - -
-
-
-
2023-11-17
joshua
New
[2/9] RISC-V: Handle differences between xtheadvector and vector
RISC-V: Support XTheadVector extensions
- - - -
-
-
-
2023-11-17
joshua
New
[3/9] RISC-V: Tests for overlapping RVV and XTheadVector instructions (Part1)
RISC-V: Support XTheadVector extensions
- - - -
-
-
-
2023-11-17
joshua
New
[4/9] RISC-V: Tests for overlapping RVV and XTheadVector instructions (Part2)
RISC-V: Support XTheadVector extensions
- - - -
-
-
-
2023-11-17
joshua
New
[5/9] RISC-V: Tests for overlapping RVV and XTheadVector instructions (Part3)
RISC-V: Support XTheadVector extensions
- - - -
-
-
-
2023-11-17
joshua
New
[6/9] RISC-V: Tests for overlapping RVV and XTheadVector instructions (Part4)
RISC-V: Support XTheadVector extensions
- - - -
-
-
-
2023-11-17
joshua
New
[7/9] RISC-V: Tests for overlapping RVV and XTheadVector instructions (Part5)
RISC-V: Support XTheadVector extensions
- - - -
-
-
-
2023-11-17
joshua
New
[8/9] RISC-V: Add support for xtheadvector-specific load/store intrinsics
RISC-V: Support XTheadVector extensions
- - - -
-
-
-
2023-11-17
joshua
New
[9/9] RISC-V: Disable fractional type intrinsics for the XTheadVector extension
RISC-V: Support XTheadVector extensions
- - - -
-
-
-
2023-11-17
joshua
New
[v2,1/9] RISC-V: minimal support for xtheadvector
RISC-V: Support XTheadVector extensions
- - - -
-
-
-
2023-11-18
joshua
New
[v2,2/9] RISC-V: Handle differences between xtheadvector and vector
RISC-V: Support XTheadVector extensions
- - - -
-
-
-
2023-11-18
joshua
New
[v2,3/9] RISC-V: Tests for overlapping RVV and XTheadVector instructions (Part1)
RISC-V: Support XTheadVector extensions
- - - -
-
-
-
2023-11-18
joshua
New
[v2,4/9] RISC-V: Tests for overlapping RVV and XTheadVector instructions (Part2)
RISC-V: Support XTheadVector extensions
- - - -
-
-
-
2023-11-18
joshua
New
[v2,5/9] RISC-V: Tests for overlapping RVV and XTheadVector instructions (Part3)
RISC-V: Support XTheadVector extensions
- - - -
-
-
-
2023-11-18
joshua
New
[v2,6/9] RISC-V: Tests for overlapping RVV and XTheadVector instructions (Part4)
RISC-V: Support XTheadVector extensions
- - - -
-
-
-
2023-11-18
joshua
New
[v2,8/9] RISC-V: Add support for xtheadvector-specific load/store intrinsics
RISC-V: Support XTheadVector extensions
- - - -
-
-
-
2023-11-18
joshua
New
[v2,9/9] RISC-V: Disable fractional type intrinsics for the XTheadVector extension
RISC-V: Support XTheadVector extensions
- - - -
-
-
-
2023-11-18
joshua
New
[v3,1/6] RISC-V: Refactor riscv-vector-builtins-bases.cc
RISC-V: Support XTheadVector extension
- - - -
-
-
-
2023-12-20
joshua
New
[v3,2/6] RISC-V: Split csr_operand in predicates.md for vector patterns.
RISC-V: Support XTheadVector extension
- - - -
-
-
-
2023-12-20
joshua
New
[v3,3/6] RISC-V: Introduce XTheadVector as a subset of V1.0.0
RISC-V: Support XTheadVector extension
- - - -
-
-
-
2023-12-20
joshua
New
[v3,4/6] RISC-V: Adds the prefix "th." for the instructions of XTheadVector.
RISC-V: Support XTheadVector extension
- - - -
-
-
-
2023-12-20
joshua
New
[v3,5/6] RISC-V: Handle differences between XTheadvector and Vector
RISC-V: Support XTheadVector extension
- - - -
-
-
-
2023-12-20
joshua
New
[v3,6/6] RISC-V: Add support for xtheadvector-specific intrinsics.
RISC-V: Support XTheadVector extension
- - - -
-
-
-
2023-12-20
joshua
New
[v4,4/6] RISC-V: Adds the prefix "th." for the instructions of XTheadVector.
Untitled series #387994
- - - -
-
-
-
2023-12-25
joshua
New
[v4,5/6] RISC-V: Handle differences between XTheadvector and Vector
Untitled series #387994
- - - -
-
-
-
2023-12-25
joshua
New
[v4,6/6] RISC-V: Add support for xtheadvector-specific intrinsics.
Untitled series #387994
- - - -
-
-
-
2023-12-25
joshua
New
回复:[PATCH v4 4/6] RISC-V: Adds the prefix "th." for the instructions of XTheadVector.
回复:[PATCH v4 4/6] RISC-V: Adds the prefix "th." for the instructions of XTheadVector.
- - - -
-
-
-
2023-12-25
joshua
New
[v4,4/6] RISC-V: Adds the prefix "th." for the instructions of XTheadVector.
Untitled series #388000
- - - -
-
-
-
2023-12-25
joshua
New
[v4,5/6] RISC-V: Handle differences between XTheadvector and Vector
Untitled series #388306
- - - -
-
-
-
2023-12-29
joshua
New
[v4,6/6] RISC-V: Add support for xtheadvector-specific intrinsics.
Untitled series #388306
- - - -
-
-
-
2023-12-29
joshua
New
回复:[PATCH v4 5/6] RISC-V: Handle differences between XTheadvector and Vector
回复:[PATCH v4 5/6] RISC-V: Handle differences between XTheadvector and Vector
- - - -
-
-
-
2023-12-29
joshua
New
Re:[PATCH v4 5/6] RISC-V: Handle differences between XTheadvector and Vector
Re:[PATCH v4 5/6] RISC-V: Handle differences between XTheadvector and Vector
- - - -
-
-
-
2023-12-29
joshua
New
Re:[PATCH v4 5/6] RISC-V: Handle differences between XTheadvector and Vector
Re:[PATCH v4 5/6] RISC-V: Handle differences between XTheadvector and Vector
- - - -
-
-
-
2023-12-29
joshua
New
Re:Re:[PATCH v4 5/6] RISC-V: Handle differences between XTheadvector and Vector
Re:Re:[PATCH v4 5/6] RISC-V: Handle differences between XTheadvector and Vector
- - - -
-
-
-
2023-12-29
joshua
New
Re:[PATCH v4 5/6] RISC-V: Handle differences between XTheadvector and Vector
Re:[PATCH v4 5/6] RISC-V: Handle differences between XTheadvector and Vector
- - - -
-
-
-
2023-12-29
joshua
New
[v4] RISC-V: Refactor riscv-vector-builtins-bases.cc
[v4] RISC-V: Refactor riscv-vector-builtins-bases.cc
- - - -
-
-
-
2023-12-29
joshua
New
[v4] RISC-V: Change csr_operand into
[v4] RISC-V: Change csr_operand into
- - - -
-
-
-
2023-12-29
joshua
New
[v4] RISC-V: Change csr_operand into vector_length_operand for vsetvl patterns.
[v4] RISC-V: Change csr_operand into vector_length_operand for vsetvl patterns.
- - - -
-
-
-
2023-12-29
joshua
New
[v4] RISC-V: Introduce XTheadVector as a subset of V1.0.0
[v4] RISC-V: Introduce XTheadVector as a subset of V1.0.0
- - - -
-
-
-
2023-12-29
joshua
New
[v4] RISC-V: Adds the prefix "th." for the instructions of XTheadVector.
[v4] RISC-V: Adds the prefix "th." for the instructions of XTheadVector.
- - - -
-
-
-
2023-12-29
joshua
New
[v4] RISC-V: Handle differences between XTheadvector and Vector
[v4] RISC-V: Handle differences between XTheadvector and Vector
- - - -
-
-
-
2023-12-29
joshua
New
[v4,6/6] RISC-V: Add support for xtheadvector-specific intrinsics.
[v4] RISC-V: Refactor riscv-vector-builtins-bases.cc
- - - -
-
-
-
2023-12-29
joshua
New
Re:[PATCH v4] RISC-V: Handle differences between XTheadvector and Vector
Re:[PATCH v4] RISC-V: Handle differences between XTheadvector and Vector
- - - -
-
-
-
2024-01-02
joshua
New
Re:Re:[PATCH v4] RISC-V: Handle differences between XTheadvector and Vector
Re:Re:[PATCH v4] RISC-V: Handle differences between XTheadvector and Vector
- - - -
-
-
-
2024-01-02
joshua
New
Re:[PATCH v4] RISC-V: Handle differences between XTheadvector and Vector
Re:[PATCH v4] RISC-V: Handle differences between XTheadvector and Vector
- - - -
-
-
-
2024-01-02
joshua
New
[v4] RISC-V: Handle differences between XTheadvector and Vector
[v4] RISC-V: Handle differences between XTheadvector and Vector
- - - -
-
-
-
2024-01-02
joshua
New
[v4] RISC-V: Fix register overlap issue for some xtheadvector instructions
[v4] RISC-V: Fix register overlap issue for some xtheadvector instructions
- - - -
-
-
-
2024-01-03
joshua
New
[v4] RISC-V: Rewrite some instructions using ASM targethook
[v4] RISC-V: Rewrite some instructions using ASM targethook
- - - -
-
-
-
2024-01-03
joshua
New
[v4] RISC-V: Adds the prefix "th." for the instructions of XTheadVector.
[v4] RISC-V: Adds the prefix "th." for the instructions of XTheadVector.
- - - -
-
-
-
2024-01-03
joshua
New
[v4] RISC-V: Handle differences between XTheadvector and Vector
[v4] RISC-V: Handle differences between XTheadvector and Vector
- - - -
-
-
-
2024-01-03
joshua
New
[v4] RISC-V: Fix register overlap issue for some xtheadvector instructions
[v4] RISC-V: Fix register overlap issue for some xtheadvector instructions
- - - -
-
-
-
2024-01-03
joshua
New
[v4] RISC-V: Rewrite some instructions using ASM targethook
[v4] RISC-V: Rewrite some instructions using ASM targethook
- - - -
-
-
-
2024-01-03
joshua
New
[v4] RISC-V: Handle differences between XTheadvector and Vector
[v4] RISC-V: Handle differences between XTheadvector and Vector
- - - -
-
-
-
2024-01-04
joshua
New
[v4] RISC-V: Add support for xtheadvector-specific intrinsics.
[v4] RISC-V: Add support for xtheadvector-specific intrinsics.
- - - -
-
-
-
2024-01-04
joshua
New
[v4] RISC-V: Introduce XTheadVector as a subset of V1.0.0
[v4] RISC-V: Introduce XTheadVector as a subset of V1.0.0
- - - -
-
-
-
2024-01-04
joshua
New
Re:[PATCH v4] RISC-V: Handle differences between XTheadvector and Vector
Re:[PATCH v4] RISC-V: Handle differences between XTheadvector and Vector
- - - -
-
-
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2024-01-09
joshua
New
[v5] RISC-V: Handle differences between XTheadvector and Vector
[v5] RISC-V: Handle differences between XTheadvector and Vector
- - - -
-
-
-
2024-01-09
joshua
New
Re:[PATCH v4] RISC-V: Handle differences between XTheadvector and Vector
Re:[PATCH v4] RISC-V: Handle differences between XTheadvector and Vector
- - - -
-
-
-
2024-01-09
joshua
New
[v5] RISC-V: Handle differences between XTheadvector and Vector
[v5] RISC-V: Handle differences between XTheadvector and Vector
- - - -
-
-
-
2024-01-10
joshua
New
Re:[PATCH v5] RISC-V: Handle differences between XTheadvector and Vector
Re:[PATCH v5] RISC-V: Handle differences between XTheadvector and Vector
- - - -
-
-
-
2024-01-10
joshua
New
[v5] RISC-V: Fix register overlap issue for some xtheadvector instructions
[v5] RISC-V: Fix register overlap issue for some xtheadvector instructions
- - - -
-
-
-
2024-01-10
joshua
New
[v5] RISC-V: Fix register overlap issue for some xtheadvector instructions
[v5] RISC-V: Fix register overlap issue for some xtheadvector instructions
- - - -
-
-
-
2024-01-10
joshua
New
Re:Re:[PATCH v5] RISC-V: Handle differences between XTheadvector and Vector
Re:Re:[PATCH v5] RISC-V: Handle differences between XTheadvector and Vector
- - - -
-
-
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2024-01-10
joshua
New
回复:Re:[PATCH v5] RISC-V: Handle differences between XTheadvector and Vector
回复:Re:[PATCH v5] RISC-V: Handle differences between XTheadvector and Vector
- - - -
-
-
-
2024-01-10
joshua
New
Re:Re:[PATCH v5] RISC-V: Handle differences between XTheadvector and Vector
Re:Re:[PATCH v5] RISC-V: Handle differences between XTheadvector and Vector
- - - -
-
-
-
2024-01-10
joshua
New
[v5] RISC-V: Add support for xtheadvector-specific intrinsics.
[v5] RISC-V: Add support for xtheadvector-specific intrinsics.
- - - -
-
-
-
2024-01-10
joshua
New
[v5] RISC-V: Add support for xtheadvector-specific intrinsics.
[v5] RISC-V: Add support for xtheadvector-specific intrinsics.
- - - -
-
-
-
2024-01-10
joshua
New
Re:[PATCH v5] RISC-V: Add support for xtheadvector-specific intrinsics.
Re:[PATCH v5] RISC-V: Add support for xtheadvector-specific intrinsics.
- - - -
-
-
-
2024-01-10
joshua
New
Re:Re:[PATCH v5] RISC-V: Add support for xtheadvector-specific intrinsics.
Re:Re:[PATCH v5] RISC-V: Add support for xtheadvector-specific intrinsics.
- - - -
-
-
-
2024-01-10
joshua
New
Re:Re:[PATCH v5] RISC-V: Add support for xtheadvector-specific intrinsics.
Re:Re:[PATCH v5] RISC-V: Add support for xtheadvector-specific intrinsics.
- - - -
-
-
-
2024-01-10
joshua
New
Re:Re:[PATCH v5] RISC-V: Add support for xtheadvector-specific intrinsics.
Re:Re:[PATCH v5] RISC-V: Add support for xtheadvector-specific intrinsics.
- - - -
-
-
-
2024-01-10
joshua
New
[v5] RISC-V: Fix register overlap issue for some xtheadvector instructions
[v5] RISC-V: Fix register overlap issue for some xtheadvector instructions
- - - -
-
-
-
2024-01-11
joshua
New
[v5] RISC-V: Add support for xtheadvector-specific intrinsics.
[v5] RISC-V: Add support for xtheadvector-specific intrinsics.
- - - -
-
-
-
2024-01-11
joshua
New
Re:[PATCH v5] RISC-V: Add support for xtheadvector-specific intrinsics.
Re:[PATCH v5] RISC-V: Add support for xtheadvector-specific intrinsics.
- - - -
-
-
-
2024-01-11
joshua
New
Re:[PATCH v5] RISC-V: Add support for xtheadvector-specific intrinsics.
Re:[PATCH v5] RISC-V: Add support for xtheadvector-specific intrinsics.
- - - -
-
-
-
2024-01-11
joshua
New
Re:Re:[PATCH v5] RISC-V: Add support for xtheadvector-specific intrinsics.
Re:Re:[PATCH v5] RISC-V: Add support for xtheadvector-specific intrinsics.
- - - -
-
-
-
2024-01-11
joshua
New
Re:Re:[PATCH v5] RISC-V: Add support for xtheadvector-specific intrinsics.
Re:Re:[PATCH v5] RISC-V: Add support for xtheadvector-specific intrinsics.
- - - -
-
-
-
2024-01-11
joshua
New
Re:Re:[PATCH v5] RISC-V: Add support for xtheadvector-specific intrinsics.
Re:Re:[PATCH v5] RISC-V: Add support for xtheadvector-specific intrinsics.
- - - -
-
-
-
2024-01-11
joshua
New
Re:Re:[PATCH v5] RISC-V: Add support for xtheadvector-specific intrinsics.
Re:Re:[PATCH v5] RISC-V: Add support for xtheadvector-specific intrinsics.
- - - -
-
-
-
2024-01-11
joshua
New
Re:Re:[PATCH v5] RISC-V: Add support for xtheadvector-specific intrinsics.
Re:Re:[PATCH v5] RISC-V: Add support for xtheadvector-specific intrinsics.
- - - -
-
-
-
2024-01-11
joshua
New
[v5] RISC-V: Add support for xtheadvector-specific intrinsics.
[v5] RISC-V: Add support for xtheadvector-specific intrinsics.
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2024-01-11
joshua
New
Re:[PATCH v5] RISC-V: Add support for xtheadvector-specific intrinsics.
Re:[PATCH v5] RISC-V: Add support for xtheadvector-specific intrinsics.
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2024-01-11
joshua
New
Re:[PATCH v5] RISC-V: Add support for xtheadvector-specific intrinsics.
Re:[PATCH v5] RISC-V: Add support for xtheadvector-specific intrinsics.
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2024-01-11
joshua
New
[v5] RISC-V: Handle differences between XTheadvector and Vector
[v5] RISC-V: Handle differences between XTheadvector and Vector
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2024-01-11
joshua
New
Re:Re:[PATCH v5] RISC-V: Add support for xtheadvector-specific intrinsics.
Re:Re:[PATCH v5] RISC-V: Add support for xtheadvector-specific intrinsics.
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2024-01-11
joshua
New
Re:Re:[PATCH v5] RISC-V: Add support for xtheadvector-specific intrinsics.
Re:Re:[PATCH v5] RISC-V: Add support for xtheadvector-specific intrinsics.
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2024-01-11
joshua
New
Re:Re:[PATCH v5] RISC-V: Add support for xtheadvector-specific intrinsics.
Re:Re:[PATCH v5] RISC-V: Add support for xtheadvector-specific intrinsics.
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2024-01-11
joshua
New
Re:Re:[PATCH v5] RISC-V: Add support for xtheadvector-specific intrinsics.
Re:Re:[PATCH v5] RISC-V: Add support for xtheadvector-specific intrinsics.
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2024-01-11
joshua
New
Re:Re:[PATCH v5] RISC-V: Add support for xtheadvector-specific intrinsics.
Re:Re:[PATCH v5] RISC-V: Add support for xtheadvector-specific intrinsics.
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2024-01-11
joshua
New
回复:Re:[PATCH v5] RISC-V: Add support for xtheadvector-specific intrinsics.
回复:Re:[PATCH v5] RISC-V: Add support for xtheadvector-specific intrinsics.
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2024-01-12
joshua
New
[v4] RISC-V: Introduce XTheadVector as a subset of V1.0.0
[v4] RISC-V: Introduce XTheadVector as a subset of V1.0.0
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2024-01-12
joshua
New
[v5] RISC-V: Adds the prefix "th." for the instructions of XTheadVector.
[v5] RISC-V: Adds the prefix "th." for the instructions of XTheadVector.
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2024-01-12
joshua
New
[v6] RISC-V: Handle differences between XTheadvector and Vector
[v6] RISC-V: Handle differences between XTheadvector and Vector
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2024-01-12
joshua
New
[v6] RISC-V: Add support for xtheadvector-specific intrinsics.
[v6] RISC-V: Add support for xtheadvector-specific intrinsics.
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2024-01-12
joshua
New
[v6] RISC-V: Fix register overlap issue for some xtheadvector instructions
[v6] RISC-V: Fix register overlap issue for some xtheadvector instructions
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2024-01-12
joshua
New
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