Show patches with: Submitter = Roger Sayle       |    State = Action Required       |    Archived = No       |   430 patches
« 1 2 3 4 … 4 5 »
Patch Series A/F/R/T S/W/F Date Submitter Delegate State
x86_64: Use peephole2 to eliminate redundant moves. x86_64: Use peephole2 to eliminate redundant moves. - - - - --- 2020-08-11 Roger Sayle New
x86_64: Some SUBREG related optimization tweaks to i386 backend. x86_64: Some SUBREG related optimization tweaks to i386 backend. - - - - --- 2021-10-11 Roger Sayle New
x86_64: PR target/100711: Splitters for pandn x86_64: PR target/100711: Splitters for pandn - - - - --- 2021-11-28 Roger Sayle New
x86_64: PR rtl-optimization/92180: class_likely_spilled vs. cant_combine_insn. x86_64: PR rtl-optimization/92180: class_likely_spilled vs. cant_combine_insn. - - - - --- 2020-08-17 Roger Sayle New
x86_64: Integer min/max improvements. x86_64: Integer min/max improvements. - - - - --- 2020-07-30 Roger Sayle New
x86_64: Improvements to arithmetic right shifts of V1TImode values. x86_64: Improvements to arithmetic right shifts of V1TImode values. - - - - --- 2022-01-11 Roger Sayle New
x86_64: Improved implementation of TImode rotations. x86_64: Improved implementation of TImode rotations. - - - - --- 2021-11-01 Roger Sayle New
x86_64: Improved V1TImode rotations by non-constant amounts. x86_64: Improved V1TImode rotations by non-constant amounts. - - - - --- 2021-11-28 Roger Sayle New
x86_64: Improve code expanded for highpart multiplications. x86_64: Improve code expanded for highpart multiplications. - - - - --- 2021-12-10 Roger Sayle New
x86_64: Improve (interunit) moves from TImode to V1TImode. x86_64: Improve (interunit) moves from TImode to V1TImode. - - - - --- 2022-01-06 Roger Sayle New
x86_64: Implement V1TI mode shifts/rotates by a constant x86_64: Implement V1TI mode shifts/rotates by a constant - - - - --- 2021-10-24 Roger Sayle New
x86_64: Expand ashrv1ti (and PR target/102986) x86_64: Expand ashrv1ti (and PR target/102986) - - - - --- 2021-10-30 Roger Sayle New
x86_64: Avoid rorx rotation instructions with -Os x86_64: Avoid rorx rotation instructions with -Os - - - - --- 2021-11-15 Roger Sayle New
x86_64: Add insn patterns for V1TI mode logic operations. x86_64: Add insn patterns for V1TI mode logic operations. - - - - --- 2021-10-22 Roger Sayle New
x86: Shrink writing 0/-1 to memory using and/or with -Oz. x86: Shrink writing 0/-1 to memory using and/or with -Oz. - - - - --- 2021-12-21 Roger Sayle New
x86: PR target/103611: Splitter for DST:DI = (HI:SI<<32)|LO:SI. x86: PR target/103611: Splitter for DST:DI = (HI:SI<<32)|LO:SI. - - - - --- 2021-12-13 Roger Sayle New
x86: Improve expansion of __builtin_parity x86: Improve expansion of __builtin_parity - - - - --- 2020-06-06 Roger Sayle New
tree-optimization/103345: Improved load merging tree-optimization/103345: Improved load merging - - - - --- 2021-11-22 Roger Sayle New
simplify-rtx: Two easy pieces. simplify-rtx: Two easy pieces. - - - - --- 2020-06-19 Roger Sayle New
nvptx: Use cvt to perform sign-extension of truncation. nvptx: Use cvt to perform sign-extension of truncation. - - - - --- 2021-08-27 Roger Sayle New
nvptx: Tweak constraints on copysign instructions. nvptx: Tweak constraints on copysign instructions. - - - - --- 2022-02-08 Roger Sayle New
nvptx: Support floating point reciprocal instructions. nvptx: Support floating point reciprocal instructions. - - - - --- 2020-07-12 Roger Sayle New
nvptx: Support 16-bit shifts and extendqihi2. nvptx: Support 16-bit shifts and extendqihi2. - - - - --- 2020-07-11 Roger Sayle New
nvptx: Provide vec_set<mode> and vec_extract<vmode><mode> patterns. nvptx: Provide vec_set<mode> and vec_extract<vmode><mode> patterns. - - - - --- 2020-07-15 Roger Sayle New
nvptx: Improved support for HFMode including neghf2 and abshf2. nvptx: Improved support for HFMode including neghf2 and abshf2. - - - - --- 2022-01-08 Roger Sayle New
nvptx: Fix and use BI mode logic instructions (e.g. and.pred). nvptx: Fix and use BI mode logic instructions (e.g. and.pred). - - - - --- 2022-01-16 Roger Sayle New
nvptx: Fix ICE in nvptx_vector_alignment on gcc.dg/attr-vector_size.c nvptx: Fix ICE in nvptx_vector_alignment on gcc.dg/attr-vector_size.c - - - - --- 2020-06-29 Roger Sayle New
nvptx: Expand QI mode operations using SI mode instructions. nvptx: Expand QI mode operations using SI mode instructions. - - - - --- 2022-01-10 Roger Sayle New
nvptx: Back-end portion of a fix for PR target/104489. nvptx: Back-end portion of a fix for PR target/104489. - - - - --- 2022-02-11 Roger Sayle New
nvptx: Adds uses of -misa=sm_75 and -misa=sm_80 nvptx: Adds uses of -misa=sm_75 and -misa=sm_80 - - - - --- 2021-09-17 Roger Sayle New
nvptx: Add suppport for __builtin_nvptx_brev instrinsic. nvptx: Add suppport for __builtin_nvptx_brev instrinsic. - - - - --- 2023-05-06 Roger Sayle New
nvptx: Add support for PTX's cnot instruction. nvptx: Add support for PTX's cnot instruction. - - - - --- 2022-01-06 Roger Sayle New
nvptx: Add support for PTX highpart multiplications (e.g. mul.hi.s32) nvptx: Add support for PTX highpart multiplications (e.g. mul.hi.s32) - - - - --- 2020-08-04 Roger Sayle New
nvptx: Add support for 64-bit mul.hi (and other) instructions. nvptx: Add support for 64-bit mul.hi (and other) instructions. - - - - --- 2022-01-14 Roger Sayle New
nvptx: Add a __PTX_ISA__ predefined macro based on target ISA. nvptx: Add a __PTX_ISA__ predefined macro based on target ISA. - - - - --- 2021-08-19 Roger Sayle New
nvptx: Add (experimental) support for HFmode with -misa=sm_53 nvptx: Add (experimental) support for HFmode with -misa=sm_53 - - - - --- 2021-09-16 Roger Sayle New
nvptx: : Add support for popcount and widening multiply instructions nvptx: : Add support for popcount and widening multiply instructions - - - - --- 2020-07-01 Roger Sayle New
nvptx: : Add support for popcount and widening multiply instructions nvptx: : Add support for popcount and widening multiply instructions - - - - --- 2020-07-03 Roger Sayle New
mips: Improved RTL representation of wsbh/dsbh/dshd mips: Improved RTL representation of wsbh/dsbh/dshd - - - - --- 2021-12-10 Roger Sayle New
middle-end: Support ABIs that pass FP values as wider integers. middle-end: Support ABIs that pass FP values as wider integers. - - - - --- 2022-02-09 Roger Sayle New
middle-end: Simplify popcount/parity of bswap/rotate. middle-end: Simplify popcount/parity of bswap/rotate. - - - - --- 2020-08-21 Roger Sayle New
middle-end: Simplify (sign_extend:HI (truncate:QI (ashiftrt:HI X 8))) middle-end: Simplify (sign_extend:HI (truncate:QI (ashiftrt:HI X 8))) - - - - --- 2020-07-19 Roger Sayle New
middle-end: Remove truly_noop_truncation check from convert.c middle-end: Remove truly_noop_truncation check from convert.c - - - - --- 2020-07-11 Roger Sayle New
middle-end: Recognize/canonicalize MULT_HIGHPART_EXPR and expand it. middle-end: Recognize/canonicalize MULT_HIGHPART_EXPR and expand it. - - - - --- 2020-08-04 Roger Sayle New
middle-end: Recognize idioms for bswap32 and bswap64 in match.pd. middle-end: Recognize idioms for bswap32 and bswap64 in match.pd. - - - - --- 2020-08-12 Roger Sayle New
middle-end: Parity folding optimizations. middle-end: Parity folding optimizations. - - - - --- 2020-06-12 Roger Sayle New
middle-end: PR tree-optimization/21137: STRIP_NOPS avoids missed optimization. middle-end: PR tree-optimization/21137: STRIP_NOPS avoids missed optimization. - - - - --- 2020-08-21 Roger Sayle New
middle-end: Optimize (A&C)^(B&C) to (A^B)&C in simplify_rtx. middle-end: Optimize (A&C)^(B&C) to (A^B)&C in simplify_rtx. - - - - --- 2020-06-11 Roger Sayle New
middle-end: Optimize ((X >> C1) & C2) != C3 for more cases. middle-end: Optimize ((X >> C1) & C2) != C3 for more cases. - - - - --- 2022-08-07 Roger Sayle New
middle-end: More support for ABIs that pass FP values as wider ints. middle-end: More support for ABIs that pass FP values as wider ints. - - - - --- 2022-07-26 Roger Sayle New
middle-end: Improve RTL expansion in expand_mul_overflow, middle-end: Improve RTL expansion in expand_mul_overflow, - - - - --- 2020-07-06 Roger Sayle New
middle-end: Fold popcount(x&4) to (x>>2)&1 and friends. middle-end: Fold popcount(x&4) to (x>>2)&1 and friends. - - - - --- 2020-07-20 Roger Sayle New
middle-end: Fix PR middle-end/85811: Introduce tree_expr_maybe_nan_p et al. middle-end: Fix PR middle-end/85811: Introduce tree_expr_maybe_nan_p et al. - - - - --- 2020-08-15 Roger Sayle New
middle-end: Correct calculation of mul_widen_cost and mul_highpart_cost. middle-end: Correct calculation of mul_widen_cost and mul_highpart_cost. - - - - --- 2020-08-09 Roger Sayle New
middle-end: Allow backend to expand/split double word compare to 0/-1. middle-end: Allow backend to expand/split double word compare to 0/-1. - - - - --- 2022-08-03 Roger Sayle New
match.pd: Simplify popcount(X&Y)+popcount(X|Y) as popcount(X)+popcount(Y) match.pd: Simplify popcount(X&Y)+popcount(X|Y) as popcount(X)+popcount(Y) - - - - --- 2023-05-10 Roger Sayle New
ivopts: Improve code generated for very simple loops. ivopts: Improve code generated for very simple loops. - - - - --- 2021-11-15 Roger Sayle New
i386: Improve code generation of smin(x,0) with -m32. i386: Improve code generation of smin(x,0) with -m32. - - - - --- 2020-08-10 Roger Sayle New
hppa: PR middle-end/87256: Improved hppa_rtx_costs avoids synth_mult madness. hppa: PR middle-end/87256: Improved hppa_rtx_costs avoids synth_mult madness. - - - - --- 2020-08-21 Roger Sayle New
hppa: Improve hppa_rtx_costs for shifts by constants. hppa: Improve hppa_rtx_costs for shifts by constants. - - - - --- 2020-08-27 Roger Sayle New
hppa: Improve expansion of ashldi3 when !TARGET_64BIT hppa: Improve expansion of ashldi3 when !TARGET_64BIT - - - - --- 2020-08-21 Roger Sayle New
hppa64: Improve hppa_rtx_costs for DImode shifts by constants. hppa64: Improve hppa_rtx_costs for DImode shifts by constants. - - - - --- 2020-09-07 Roger Sayle New
gfortran: Respect target's NO_DOT_IN_LABEL in trans-common.cc gfortran: Respect target's NO_DOT_IN_LABEL in trans-common.cc - - - - --- 2022-02-10 Roger Sayle New
gfortran: Improve translation of POPPAR intrinsic gfortran: Improve translation of POPPAR intrinsic - - - - --- 2020-06-14 Roger Sayle New
genmatch: Avoid unused parameter warnings in generated code. genmatch: Avoid unused parameter warnings in generated code. - - - - --- 2020-08-01 Roger Sayle New
c++: PR c++/95999: Improved error recovery in enumeration lists. c++: PR c++/95999: Improved error recovery in enumeration lists. - - - - --- 2022-02-21 Roger Sayle New
bfin: Popcount-related improvements to machine description. bfin: Popcount-related improvements to machine description. - - - - --- 2021-10-17 Roger Sayle New
[xstormy16] Update xstormy16_rtx_costs. [xstormy16] Update xstormy16_rtx_costs. - - - - --- 2023-04-22 Roger Sayle New
[xstormy16] Recognize/support swpn (swap nibbles) instruction. [xstormy16] Recognize/support swpn (swap nibbles) instruction. - - - - --- 2023-04-29 Roger Sayle New
[xstormy16] Improved SImode shifts by two bits. [xstormy16] Improved SImode shifts by two bits. - - - - --- 2023-04-22 Roger Sayle New
[xstormy16] Efficient HImode rotate left by a single bit. [xstormy16] Efficient HImode rotate left by a single bit. - - - - --- 2023-04-29 Roger Sayle New
[xstormy16] Add support for byte and word swapping instructions. [xstormy16] Add support for byte and word swapping instructions. - - - - --- 2023-04-25 Roger Sayle New
[xstormy16] Add extendhisi2 and zero_extendhisi2 patterns to stormy16.md [xstormy16] Add extendhisi2 and zero_extendhisi2 patterns to stormy16.md - - - - --- 2023-04-22 Roger Sayle New
[x86_PATCH] peephole2 to resolve failure of gcc.target/i386/pr43644-2.c [x86_PATCH] peephole2 to resolve failure of gcc.target/i386/pr43644-2.c - - - - --- 2023-12-22 Roger Sayle New
[x86_PATCH] New *ashl<dwi3>_doubleword_highpart define_insn_and_split. [x86_PATCH] New *ashl<dwi3>_doubleword_highpart define_insn_and_split. - - - - --- 2023-06-24 Roger Sayle New
[x86_64] Use [(const_int 0)] idiom consistently in i386.md [x86_64] Use [(const_int 0)] idiom consistently in i386.md - - - - --- 2023-05-10 Roger Sayle New
[x86_64] Use PTEST to perform AND in TImode STV of (A & B) != 0. [x86_64] Use PTEST to perform AND in TImode STV of (A & B) != 0. - - - - --- 2022-08-09 Roger Sayle New
[x86_64] Two minor tweaks to ix86_expand_move. [x86_64] Two minor tweaks to ix86_expand_move. - - - - --- 2023-06-16 Roger Sayle New
[x86_64] Support shifts and rotates by integer constants in TImode STV. [x86_64] Support shifts and rotates by integer constants in TImode STV. - - - - --- 2022-08-15 Roger Sayle New
[x86_64] Support pandn for V1TI mode (i.e. *andnotv1ti3). [x86_64] Support pandn for V1TI mode (i.e. *andnotv1ti3). - - - - --- 2022-04-05 Roger Sayle New
[x86_64] PR tree-opt/91384: peephole2 to eliminate testl after negl. [x86_64] PR tree-opt/91384: peephole2 to eliminate testl after negl. - - - - --- 2022-02-28 Roger Sayle New
[x86_64] PR target/11877: Use xor to write zero to memory with -Os [x86_64] PR target/11877: Use xor to write zero to memory with -Os - - - - --- 2021-06-20 Roger Sayle New
[x86_64] PR target/113690: Fix-up MULT REG_EQUAL notes in STV. [x86_64] PR target/113690: Fix-up MULT REG_EQUAL notes in STV. - - - - --- 2024-02-05 Roger Sayle New
[x86_64] PR target/112992: Optimize mode for broadcast of constants. [x86_64] PR target/112992: Optimize mode for broadcast of constants. - - - - --- 2023-12-22 Roger Sayle New
[x86_64] PR target/110551: Tweak mulx register allocation using peephole2. [x86_64] PR target/110551: Tweak mulx register allocation using peephole2. - - - - --- 2023-10-30 Roger Sayle New
[x86_64] PR target/110104: Missing peephole2 for addcarry<mode>. [x86_64] PR target/110104: Missing peephole2 for addcarry<mode>. - - - - --- 2023-06-06 Roger Sayle New
[x86_64] PR target/110083: Fix-up REG_EQUAL notes on COMPARE in STV. [x86_64] PR target/110083: Fix-up REG_EQUAL notes on COMPARE in STV. - - - - --- 2023-06-03 Roger Sayle New
[x86_64] PR target/109973: CCZmode and CCCmode variants of [v]ptest. [x86_64] PR target/109973: CCZmode and CCCmode variants of [v]ptest. - - - - --- 2023-05-29 Roger Sayle New
[x86_64] PR target/106481: Handle CONST_WIDE_INT in REG_EQUAL during STV. [x86_64] PR target/106481: Handle CONST_WIDE_INT in REG_EQUAL during STV. - - - - --- 2022-08-01 Roger Sayle New
[x86_64] PR target/106450: Tweak timode_remove_non_convertible_regs. [x86_64] PR target/106450: Tweak timode_remove_non_convertible_regs. - - - - --- 2022-07-28 Roger Sayle New
[x86_64] PR target/106231: Optimize (any_extend:DI (ctz:SI ...)). [x86_64] PR target/106231: Optimize (any_extend:DI (ctz:SI ...)). - - - - --- 2022-07-16 Roger Sayle New
[x86_64] PR target/105791: Add V1TI to V_128_256 for xop_pcmov_v1ti. [x86_64] PR target/105791: Add V1TI to V_128_256 for xop_pcmov_v1ti. - - - - --- 2022-06-02 Roger Sayle New
[x86_64] PR middle-end/109766: Prevent cprop_hardreg bloating code with -Os. [x86_64] PR middle-end/109766: Prevent cprop_hardreg bloating code with -Os. - - - - --- 2023-05-11 Roger Sayle New
[x86_64] PR middle-end/105135: Catch more cmov idioms in combine. [x86_64] PR middle-end/105135: Catch more cmov idioms in combine. - - - - --- 2022-04-19 Roger Sayle New
[x86_64] PR 90356: Use xor to load const_double 0.0 on SSE (always) [x86_64] PR 90356: Use xor to load const_double 0.0 on SSE (always) - - - - --- 2022-03-17 Roger Sayle New
[x86_64] More TImode parameter passing improvements. [x86_64] More TImode parameter passing improvements. - - - - --- 2023-07-19 Roger Sayle New
[x86_64] Introduce insvti_highpart define_insn_and_split. [x86_64] Introduce insvti_highpart define_insn_and_split. - - - - --- 2023-01-05 Roger Sayle New
[x86_64] Introduce insvti_highpart define_insn_and_split. [x86_64] Introduce insvti_highpart define_insn_and_split. - - - - --- 2023-05-06 Roger Sayle New
[x86_64] Improved insv of DImode/DFmode {high, low}parts into TImode. [x86_64] Improved insv of DImode/DFmode {high, low}parts into TImode. - - - - --- 2023-07-13 Roger Sayle New
[x86_64] Improved Scalar-To-Vector (STV) support for TImode to V1TImode. [x86_64] Improved Scalar-To-Vector (STV) support for TImode to V1TImode. - - - - --- 2022-07-09 Roger Sayle New
« 1 2 3 4 … 4 5 »