Show patches with: Submitter = Roger Sayle       |    Archived = No       |   430 patches
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Patch Series A/F/R/T S/W/F Date Submitter Delegate State
[JAVA] Enable more array bounds check elimination - - - - --- 2016-02-22 Roger Sayle New
[JAVA] Builtin support for popcount* and bswap* functions - - - - --- 2016-02-22 Roger Sayle New
POPCOUNT folding optimizations POPCOUNT folding optimizations - - - - --- 2018-02-09 Roger Sayle New
x86: Improve expansion of __builtin_parity x86: Improve expansion of __builtin_parity - - - - --- 2020-06-06 Roger Sayle New
middle-end: Optimize (A&C)^(B&C) to (A^B)&C in simplify_rtx. middle-end: Optimize (A&C)^(B&C) to (A^B)&C in simplify_rtx. - - - - --- 2020-06-11 Roger Sayle New
middle-end: Parity folding optimizations. middle-end: Parity folding optimizations. - - - - --- 2020-06-12 Roger Sayle New
gfortran: Improve translation of POPPAR intrinsic gfortran: Improve translation of POPPAR intrinsic - - - - --- 2020-06-14 Roger Sayle New
[take,2] middle-end: Optimize (A&C)^(B&C) to (A^B)&C in simplify_rtx. [take,2] middle-end: Optimize (A&C)^(B&C) to (A^B)&C in simplify_rtx. - - - - --- 2020-06-16 Roger Sayle New
simplify-rtx: Two easy pieces. simplify-rtx: Two easy pieces. - - - - --- 2020-06-19 Roger Sayle New
[committed] middle-end: Optimize (A&C)^(B&C) to (A^B)&C in simplify_rtx (take 3). [committed] middle-end: Optimize (A&C)^(B&C) to (A^B)&C in simplify_rtx (take 3). - - - - --- 2020-06-29 Roger Sayle New
nvptx: Fix ICE in nvptx_vector_alignment on gcc.dg/attr-vector_size.c nvptx: Fix ICE in nvptx_vector_alignment on gcc.dg/attr-vector_size.c - - - - --- 2020-06-29 Roger Sayle New
PR middle-end/90597: gcc_assert ICE in layout_type PR middle-end/90597: gcc_assert ICE in layout_type - - - - --- 2020-06-29 Roger Sayle New
nvptx: : Add support for popcount and widening multiply instructions nvptx: : Add support for popcount and widening multiply instructions - - - - --- 2020-07-01 Roger Sayle New
nvptx: : Add support for popcount and widening multiply instructions nvptx: : Add support for popcount and widening multiply instructions - - - - --- 2020-07-03 Roger Sayle New
middle-end: Improve RTL expansion in expand_mul_overflow, middle-end: Improve RTL expansion in expand_mul_overflow, - - - - --- 2020-07-06 Roger Sayle New
middle-end: Remove truly_noop_truncation check from convert.c middle-end: Remove truly_noop_truncation check from convert.c - - - - --- 2020-07-11 Roger Sayle New
nvptx: Support 16-bit shifts and extendqihi2. nvptx: Support 16-bit shifts and extendqihi2. - - - - --- 2020-07-11 Roger Sayle New
nvptx: Support floating point reciprocal instructions. nvptx: Support floating point reciprocal instructions. - - - - --- 2020-07-12 Roger Sayle New
nvptx: Provide vec_set<mode> and vec_extract<vmode><mode> patterns. nvptx: Provide vec_set<mode> and vec_extract<vmode><mode> patterns. - - - - --- 2020-07-15 Roger Sayle New
Define TARGET_TRULY_NOOP_TRUNCATION to false. Define TARGET_TRULY_NOOP_TRUNCATION to false. - - - - --- 2020-07-16 Roger Sayle New
middle-end: Simplify (sign_extend:HI (truncate:QI (ashiftrt:HI X 8))) middle-end: Simplify (sign_extend:HI (truncate:QI (ashiftrt:HI X 8))) - - - - --- 2020-07-19 Roger Sayle New
middle-end: Fold popcount(x&4) to (x>>2)&1 and friends. middle-end: Fold popcount(x&4) to (x>>2)&1 and friends. - - - - --- 2020-07-20 Roger Sayle New
[Committed] middle-end: Parity and popcount folding optimizations. [Committed] middle-end: Parity and popcount folding optimizations. - - - - --- 2020-07-28 Roger Sayle New
x86_64: Integer min/max improvements. x86_64: Integer min/max improvements. - - - - --- 2020-07-30 Roger Sayle New
genmatch: Avoid unused parameter warnings in generated code. genmatch: Avoid unused parameter warnings in generated code. - - - - --- 2020-08-01 Roger Sayle New
PR rtl-optimization 61494: Preserve x-0.0 with HONOR_SNANS. PR rtl-optimization 61494: Preserve x-0.0 with HONOR_SNANS. - - - - --- 2020-08-02 Roger Sayle New
PR rtl-optimization 61494: Preserve x-0.0 with HONOR_SNANS. PR rtl-optimization 61494: Preserve x-0.0 with HONOR_SNANS. - - - - --- 2020-08-02 Roger Sayle New
[testsuite] Test case for PR rtl-optimization/60473 [testsuite] Test case for PR rtl-optimization/60473 - - - - --- 2020-08-02 Roger Sayle New
middle-end: Recognize/canonicalize MULT_HIGHPART_EXPR and expand it. middle-end: Recognize/canonicalize MULT_HIGHPART_EXPR and expand it. - - - - --- 2020-08-04 Roger Sayle New
nvptx: Add support for PTX highpart multiplications (e.g. mul.hi.s32) nvptx: Add support for PTX highpart multiplications (e.g. mul.hi.s32) - - - - --- 2020-08-04 Roger Sayle New
middle-end: Correct calculation of mul_widen_cost and mul_highpart_cost. middle-end: Correct calculation of mul_widen_cost and mul_highpart_cost. - - - - --- 2020-08-09 Roger Sayle New
i386: Improve code generation of smin(x,0) with -m32. i386: Improve code generation of smin(x,0) with -m32. - - - - --- 2020-08-10 Roger Sayle New
x86_64: Use peephole2 to eliminate redundant moves. x86_64: Use peephole2 to eliminate redundant moves. - - - - --- 2020-08-11 Roger Sayle New
middle-end: Recognize idioms for bswap32 and bswap64 in match.pd. middle-end: Recognize idioms for bswap32 and bswap64 in match.pd. - - - - --- 2020-08-12 Roger Sayle New
[Committed] PR target/96558: Only call ix86_expand_clear with GENERAL_REGS. [Committed] PR target/96558: Only call ix86_expand_clear with GENERAL_REGS. - - - - --- 2020-08-12 Roger Sayle New
middle-end: Fix PR middle-end/85811: Introduce tree_expr_maybe_nan_p et al. middle-end: Fix PR middle-end/85811: Introduce tree_expr_maybe_nan_p et al. - - - - --- 2020-08-15 Roger Sayle New
x86_64: PR rtl-optimization/92180: class_likely_spilled vs. cant_combine_insn. x86_64: PR rtl-optimization/92180: class_likely_spilled vs. cant_combine_insn. - - - - --- 2020-08-17 Roger Sayle New
hppa: Improve expansion of ashldi3 when !TARGET_64BIT hppa: Improve expansion of ashldi3 when !TARGET_64BIT - - - - --- 2020-08-21 Roger Sayle New
middle-end: Simplify popcount/parity of bswap/rotate. middle-end: Simplify popcount/parity of bswap/rotate. - - - - --- 2020-08-21 Roger Sayle New
middle-end: PR tree-optimization/21137: STRIP_NOPS avoids missed optimization. middle-end: PR tree-optimization/21137: STRIP_NOPS avoids missed optimization. - - - - --- 2020-08-21 Roger Sayle New
hppa: PR middle-end/87256: Improved hppa_rtx_costs avoids synth_mult madness. hppa: PR middle-end/87256: Improved hppa_rtx_costs avoids synth_mult madness. - - - - --- 2020-08-21 Roger Sayle New
hppa: Improve hppa_rtx_costs for shifts by constants. hppa: Improve hppa_rtx_costs for shifts by constants. - - - - --- 2020-08-27 Roger Sayle New
hppa64: Improve hppa_rtx_costs for DImode shifts by constants. hppa64: Improve hppa_rtx_costs for DImode shifts by constants. - - - - --- 2020-09-07 Roger Sayle New
PR middle-end/53267: Constant fold BUILT_IN_FMOD. PR middle-end/53267: Constant fold BUILT_IN_FMOD. - - - - --- 2021-06-08 Roger Sayle New
PR tree-optimization/96392 Optimize x+0.0 if x is an integer PR tree-optimization/96392 Optimize x+0.0 if x is an integer - - - - --- 2021-06-10 Roger Sayle New
PR rtl-optimization/46235: Improved use of bt for bit tests on x86_64. PR rtl-optimization/46235: Improved use of bt for bit tests on x86_64. - - - - --- 2021-06-15 Roger Sayle New
[x86_64] PR target/11877: Use xor to write zero to memory with -Os [x86_64] PR target/11877: Use xor to write zero to memory with -Os - - - - --- 2021-06-20 Roger Sayle New
PR tree-opt/40210: Fold (bswap(X)>>C1)&C2 to (X>>C3)&C2 in match.pd PR tree-opt/40210: Fold (bswap(X)>>C1)&C2 to (X>>C3)&C2 in match.pd - - - - --- 2021-07-06 Roger Sayle New
[x86_64] : Improvement to signed division of integer constant. [x86_64] : Improvement to signed division of integer constant. - - - - --- 2021-07-08 Roger Sayle New
PR tree-optimization/38943: Preserve trapping instructions with -fnon-call-exceptions PR tree-optimization/38943: Preserve trapping instructions with -fnon-call-exceptions - - - - --- 2021-07-08 Roger Sayle New
[take,2] PR tree-optimization/38943: Preserve trapping instructions with -fpreserve-traps [take,2] PR tree-optimization/38943: Preserve trapping instructions with -fpreserve-traps - - - - --- 2021-07-10 Roger Sayle New
PR tree-optimization/101403: Incorrect folding of ((T)bswap(x))>>C PR tree-optimization/101403: Incorrect folding of ((T)bswap(x))>>C - - - - --- 2021-07-11 Roger Sayle New
[Committed] Make gimple_could_trap_p const-safe. [Committed] Make gimple_could_trap_p const-safe. - - - - --- 2021-07-13 Roger Sayle New
Fold bswap32(x) != 0 to x != 0 (and related transforms) Fold bswap32(x) != 0 to x != 0 (and related transforms) - - - - --- 2021-07-18 Roger Sayle New
[take,2] Fold bswap32(x) != 0 to x != 0 (and related transforms) [take,2] Fold bswap32(x) != 0 to x != 0 (and related transforms) - - - - --- 2021-07-24 Roger Sayle New
[x86_64] Decrement followed by cmov improvements. [x86_64] Decrement followed by cmov improvements. - - - - --- 2021-07-26 Roger Sayle New
Fold (X<<C1)^(X<<C2) to a multiplication when possible. Fold (X<<C1)^(X<<C2) to a multiplication when possible. - - - - --- 2021-07-26 Roger Sayle New
[take,2] Fold (X<<C1)^(X<<C2) to a multiplication when possible. [take,2] Fold (X<<C1)^(X<<C2) to a multiplication when possible. - - - - --- 2021-07-28 Roger Sayle New
Optimize x ? bswap(x) : 0 in tree-ssa-phiopt Optimize x ? bswap(x) : 0 in tree-ssa-phiopt - - - - --- 2021-07-31 Roger Sayle New
[Committed] Use CFN_BUILT_IN_CLRSB instead of BUILT_IN_CLRSB in switch. [Committed] Use CFN_BUILT_IN_CLRSB instead of BUILT_IN_CLRSB in switch. - - - - --- 2021-08-06 Roger Sayle New
Improve handling of unknown sign bit in CCP. Improve handling of unknown sign bit in CCP. - - - - --- 2021-08-08 Roger Sayle New
Recognize highpart multiplication during RTL expansion Recognize highpart multiplication during RTL expansion - - - - --- 2021-08-08 Roger Sayle New
Improved handling of MULT_EXPR in bit CCP. Improved handling of MULT_EXPR in bit CCP. - - - - --- 2021-08-09 Roger Sayle New
Improved handling of MINUS_EXPR in bit CCP. Improved handling of MINUS_EXPR in bit CCP. - - - - --- 2021-08-12 Roger Sayle New
Fold more constants during veclower pass. Fold more constants during veclower pass. - - - - --- 2021-08-19 Roger Sayle New
nvptx: Add a __PTX_ISA__ predefined macro based on target ISA. nvptx: Add a __PTX_ISA__ predefined macro based on target ISA. - - - - --- 2021-08-19 Roger Sayle New
Simplify (truncate:QI (subreg:SI (reg:QI x))) to (reg:QI x) Simplify (truncate:QI (subreg:SI (reg:QI x))) to (reg:QI x) - - - - --- 2021-08-19 Roger Sayle New
Improved handling of shifts/rotates in bit CCP. Improved handling of shifts/rotates in bit CCP. - - - - --- 2021-08-22 Roger Sayle New
Improved handling of division/modulus in bit CCP. Improved handling of division/modulus in bit CCP. - - - - --- 2021-08-22 Roger Sayle New
Fold sign of LSHIFT_EXPR to eliminate no-op conversions. Fold sign of LSHIFT_EXPR to eliminate no-op conversions. - - - - --- 2021-08-23 Roger Sayle New
[Committed] Restore build on !TARGET_TRULY_NOOP_TRUNCATION targets [Committed] Restore build on !TARGET_TRULY_NOOP_TRUNCATION targets - - - - --- 2021-08-23 Roger Sayle New
[Committed] PR middle-end/102029: Stricter typing in LSHIFT_EXPR sign folding. [Committed] PR middle-end/102029: Stricter typing in LSHIFT_EXPR sign folding. - - - - --- 2021-08-24 Roger Sayle New
[Committed] PR middle-end/102031: Fix typo/mistake in simplify_truncation patch [Committed] PR middle-end/102031: Fix typo/mistake in simplify_truncation patch - - - - --- 2021-08-24 Roger Sayle New
[Committed] Tidy up !POINTER_TYPE_P test in match.pd LSHIFT_EXPR folding [Committed] Tidy up !POINTER_TYPE_P test in match.pd LSHIFT_EXPR folding - - - - --- 2021-08-26 Roger Sayle New
nvptx: Use cvt to perform sign-extension of truncation. nvptx: Use cvt to perform sign-extension of truncation. - - - - --- 2021-08-27 Roger Sayle New
Only simplify TRUNCATE to SUBREG on TRULY_NOOP_TRUNCATION targets Only simplify TRUNCATE to SUBREG on TRULY_NOOP_TRUNCATION targets - - - - --- 2021-08-27 Roger Sayle New
Preserve SUBREG_PROMOTED_VAR_P on (extend:HI (subreg/s:QI (reg:SI))) Preserve SUBREG_PROMOTED_VAR_P on (extend:HI (subreg/s:QI (reg:SI))) - - - - --- 2021-08-29 Roger Sayle New
PR middle-end/100810: Penalize IV candidates with undefined value bases PR middle-end/100810: Penalize IV candidates with undefined value bases - - - - --- 2021-08-31 Roger Sayle New
C: PR c/79412: Poison decls with error_mark_node after type mismatch C: PR c/79412: Poison decls with error_mark_node after type mismatch - - - - --- 2021-08-31 Roger Sayle New
Correct implementation of wi::clz Correct implementation of wi::clz - - - - --- 2021-09-05 Roger Sayle New
Simplify paradoxical subreg extensions of TRUNCATE Simplify paradoxical subreg extensions of TRUNCATE - - - - --- 2021-09-05 Roger Sayle New
More NEGATE_EXPR folding in match.pd More NEGATE_EXPR folding in match.pd - - - - --- 2021-09-09 Roger Sayle New
[Take,2] More NEGATE_EXPR folding in match.pd [Take,2] More NEGATE_EXPR folding in match.pd - - - - --- 2021-09-10 Roger Sayle New
Also preserve SUBREG_PROMOTED_VAR_P in expr.c's convert_move. Also preserve SUBREG_PROMOTED_VAR_P in expr.c's convert_move. - - - - --- 2021-09-11 Roger Sayle New
PR c/102245: Don't warn that ((_Bool)x<<0) isn't a truthvalue. PR c/102245: Don't warn that ((_Bool)x<<0) isn't a truthvalue. - - - - --- 2021-09-13 Roger Sayle New
[#2] PR c/102245: Disable sign-changing optimization for shifts by zero. [#2] PR c/102245: Disable sign-changing optimization for shifts by zero. - - - - --- 2021-09-14 Roger Sayle New
nvptx: Add (experimental) support for HFmode with -misa=sm_53 nvptx: Add (experimental) support for HFmode with -misa=sm_53 - - - - --- 2021-09-16 Roger Sayle New
nvptx: Adds uses of -misa=sm_75 and -misa=sm_80 nvptx: Adds uses of -misa=sm_75 and -misa=sm_80 - - - - --- 2021-09-17 Roger Sayle New
PR middle-end/88173: More constant folding of NaN comparisons. PR middle-end/88173: More constant folding of NaN comparisons. - - - - --- 2021-09-18 Roger Sayle New
[RFC/PATCH] C++ constexpr vs. floating point exceptions. [RFC/PATCH] C++ constexpr vs. floating point exceptions. - - - - --- 2021-09-21 Roger Sayle New
Make flag_trapping_math a non-binary Boolean. Make flag_trapping_math a non-binary Boolean. - - - - --- 2021-09-25 Roger Sayle New
Introduce sh_mul and uh_mul RTX codes for high-part multiplications Introduce sh_mul and uh_mul RTX codes for high-part multiplications - - - - --- 2021-09-25 Roger Sayle New
[RFC] Experimental __attribute__((saturating)) on integer types. [RFC] Experimental __attribute__((saturating)) on integer types. - - - - --- 2021-09-26 Roger Sayle New
[#2] Introduce smul_highpart and umul_highpart RTX for high-part multiplications [#2] Introduce smul_highpart and umul_highpart RTX for high-part multiplications - - - - --- 2021-09-29 Roger Sayle New
Try placing RTL folded constants in constant pool Try placing RTL folded constants in constant pool - - - - --- 2021-10-03 Roger Sayle New
Transition nvptx backend to STORE_FLAG_VALUE = 1 Transition nvptx backend to STORE_FLAG_VALUE = 1 - - - - --- 2021-10-05 Roger Sayle New
[Committed] Tweak new test cases for -march=cascadelake strangeness. [Committed] Tweak new test cases for -march=cascadelake strangeness. - - - - --- 2021-10-08 Roger Sayle New
x86_64: Some SUBREG related optimization tweaks to i386 backend. x86_64: Some SUBREG related optimization tweaks to i386 backend. - - - - --- 2021-10-11 Roger Sayle New
[v2] x86_64: Some SUBREG related optimization tweaks to i386 backend. [v2] x86_64: Some SUBREG related optimization tweaks to i386 backend. - - - - --- 2021-10-13 Roger Sayle New
Allow early sets of SSE hard registers from standard_sse_constant_p Allow early sets of SSE hard registers from standard_sse_constant_p - - - - --- 2021-10-15 Roger Sayle New
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