Show patches with: Submitter = Michael Meissner       |    Archived = No       |   510 patches
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Patch Series A/F/R/T S/W/F Date Submitter Delegate State
Rework 128-bit complex multiply and divide. Rework 128-bit complex multiply and divide. - - - - --- 2022-08-18 Michael Meissner New
[3/3] Add 'w' suffix for __ibm128 constants Improvements to __ibm128 on PowerPC - - - - --- 2022-08-18 Michael Meissner New
[2/3] Allow __ibm128 with -msoft-float (PR target/105334) Improvements to __ibm128 on PowerPC - - - - --- 2022-08-18 Michael Meissner New
[1/3] Allow __ibm128 even if IEEE 128-bit floating point is not supported. Improvements to __ibm128 on PowerPC - - - - --- 2022-08-18 Michael Meissner New
[5/5] Support IEEE 128-bit overload test data built-in functions. IEEE 128-bit built-in overload support. - - - - --- 2022-07-28 Michael Meissner New
[4/5] Support IEEE 128-bit overload extract and insert built-in functions. IEEE 128-bit built-in overload support. - - - - --- 2022-07-28 Michael Meissner New
[3/5] Support IEEE 128-bit overload comparison built-in functions. IEEE 128-bit built-in overload support. - - - - --- 2022-07-28 Michael Meissner New
[2/5] Support IEEE 128-bit overload round_to_odd built-in functions. IEEE 128-bit built-in overload support. - - - - --- 2022-07-28 Michael Meissner New
[1/5] IEEE 128-bit built-in overload support. IEEE 128-bit built-in overload support. - - - - --- 2022-07-28 Michael Meissner New
[V2] Do not enable -mblock-ops-vector-pair. [V2] Do not enable -mblock-ops-vector-pair. - - - - --- 2022-07-25 Michael Meissner New
Remove setting -mblock-ops-vector-pair on power10. Remove setting -mblock-ops-vector-pair on power10. - - - - --- 2022-07-21 Michael Meissner New
[V2] Disable generating load/store vector pairs for block copies. [V2] Disable generating load/store vector pairs for block copies. - - - - --- 2022-06-10 Michael Meissner New
[3/3] Adjust MMA tests to account for no store vector pair. Disable generating store vector pair. - - - - --- 2022-06-07 Michael Meissner New
[2/3] Disable generating load/store vector pairs for block copies. Disable generating store vector pair. - - - - --- 2022-06-07 Michael Meissner New
[1/3] Disable generating store vector pair. Disable generating store vector pair. - - - - --- 2022-06-07 Michael Meissner New
[V3] Optimize vec_splats of constant vec_extract for V2DI/V2DF, PR target 99293 [V3] Optimize vec_splats of constant vec_extract for V2DI/V2DF, PR target 99293 - - - - --- 2022-06-07 Michael Meissner New
Generate vadduqm and vsubuqm for TImode add/subtract Generate vadduqm and vsubuqm for TImode add/subtract - - - - --- 2022-05-13 Michael Meissner New
Optimize multiply/add of DImode extended to TImode, PR target/103109. Optimize multiply/add of DImode extended to TImode, PR target/103109. - - - - --- 2022-05-13 Michael Meissner New
Add zero_extendditi2. Improve lxvr*x code generation. Add zero_extendditi2. Improve lxvr*x code generation. - - - - --- 2022-05-13 Michael Meissner New
Delay splitting addti3/subti3 until first split pass. Delay splitting addti3/subti3 until first split pass. - - - - --- 2022-05-13 Michael Meissner New
Replace UNSPEC with RTL code for extendditi2. Replace UNSPEC with RTL code for extendditi2. - - - - --- 2022-05-13 Michael Meissner New
Optimize vec_splats of constant V2DI/V2DF vec_extract, PR target/99293 Optimize vec_splats of constant V2DI/V2DF vec_extract, PR target/99293 - - - - --- 2022-05-13 Michael Meissner New
Remove -mpower8-fusion options Remove -mpower8-fusion options - - - - --- 2022-05-12 Michael Meissner New
[V4] Eliminate power8 fusion options, use power8 tuning, PR target/102059 [V4] Eliminate power8 fusion options, use power8 tuning, PR target/102059 - - - - --- 2022-04-13 Michael Meissner New
[V3] Eliminate power8 fusion options, use power8 tuning, PR target/102059 [V3] Eliminate power8 fusion options, use power8 tuning, PR target/102059 - - - - --- 2022-04-07 Michael Meissner New
Committed: [PATCH] Disable float128 tests on VxWorks, PR target/104253. Committed: [PATCH] Disable float128 tests on VxWorks, PR target/104253. - - - - --- 2022-04-07 Michael Meissner New
Disable float128 tests on VxWorks, PR target/104253. Disable float128 tests on VxWorks, PR target/104253. - - - - --- 2022-04-07 Michael Meissner New
Add zero_extendditi2. Improve lxvr*x code generation. Add zero_extendditi2. Improve lxvr*x code generation. - - - - --- 2022-04-06 Michael Meissner New
Replace UNSPEC with RTL code for extendditi2. Replace UNSPEC with RTL code for extendditi2. - - - - --- 2022-04-01 Michael Meissner New
[V2] Optimize vec_splats of constant vec_extract for V2DI/V2DF, PR target 99293. [V2] Optimize vec_splats of constant vec_extract for V2DI/V2DF, PR target 99293. - - - - --- 2022-03-30 Michael Meissner New
[4/4] Allow vsx_extract_<mode> to use Altivec registers, PR target/99293 Optimize vec_splats of vec_extract, PR target/99293 - - - - --- 2022-03-28 Michael Meissner New
[3/4] Make vsx_extract_<mode> use correct insn attributes, PR target 99293. Optimize vec_splats of vec_extract, PR target/99293 - - - - --- 2022-03-28 Michael Meissner New
[2/4] Make vsx_splat_<mode>_reg use correct insn attributes, PR target/99293 Optimize vec_splats of vec_extract, PR target/99293 - - - - --- 2022-03-28 Michael Meissner New
[1/4] Optimize vec_splats of constant vec_extract for V2DI/V2DF, PR target 99293. Optimize vec_splats of vec_extract, PR target/99293 - - - - --- 2022-03-28 Michael Meissner New
[BACKPORT] Backport PR fortran/96983 fix to GCC 11 [BACKPORT] Backport PR fortran/96983 fix to GCC 11 - - - - --- 2022-03-17 Michael Meissner New
Fix DImode to TImode sign extend issue, PR target/104868 Fix DImode to TImode sign extend issue, PR target/104868 - - - - --- 2022-03-11 Michael Meissner New
[V2] Eliminate power8 fusion options, use power8 tuning, PR target/102059 [V2] Eliminate power8 fusion options, use power8 tuning, PR target/102059 - - - - --- 2022-03-10 Michael Meissner New
[COMMITTED] Optimize signed DImode -> TImode on power10. [COMMITTED] Optimize signed DImode -> TImode on power10. - - - - --- 2022-03-05 Michael Meissner New
[V2] Optimize signed DImode -> TImode on power10, PR target/104698 [V2] Optimize signed DImode -> TImode on power10, PR target/104698 - - - - --- 2022-03-02 Michael Meissner New
Optimize signed DImode -> TImode on power10, PR target/104698 Optimize signed DImode -> TImode on power10, PR target/104698 - - - - --- 2022-03-01 Michael Meissner New
Don't do int cmoves for IEEE comparisons, PR target/104256. Don't do int cmoves for IEEE comparisons, PR target/104256. - - - - --- 2022-02-17 Michael Meissner New
[V3] PR target/99708- Define __SIZEOF_FLOAT128__ and __SIZEOF_IBM128__ [V3] PR target/99708- Define __SIZEOF_FLOAT128__ and __SIZEOF_IBM128__ - - - - --- 2022-02-16 Michael Meissner New
, PR target/99708 - Define __SIZEOF_FLOAT128__ and __SIZEOF_IBM128__ , PR target/99708 - Define __SIZEOF_FLOAT128__ and __SIZEOF_IBM128__ - - - - --- 2022-02-15 Michael Meissner New
PR target/102059 Fix inline of target specific functions PR target/102059 Fix inline of target specific functions - - - - --- 2022-02-09 Michael Meissner New
[V2] Use system default for long double if not specified on PowerPC. [V2] Use system default for long double if not specified on PowerPC. - - - - --- 2022-02-04 Michael Meissner New
Ping: [PATCH] Use system default for long double if not specified on PowerPC. Ping: [PATCH] Use system default for long double if not specified on PowerPC. - - - - --- 2022-01-31 Michael Meissner New
, PR 104253, Fix __ibm128 conversions on IEEE 128-bit system , PR 104253, Fix __ibm128 conversions on IEEE 128-bit system - - - - --- 2022-01-29 Michael Meissner New
Ping, important: [PATCH] Use system default for long double if not specified on PowerPC. Ping, important: [PATCH] Use system default for long double if not specified on PowerPC. - - - - --- 2022-01-21 Michael Meissner New
Mark XXSPLTIW/XXSPLTIDP as prefixed -- PR 104136 Mark XXSPLTIW/XXSPLTIDP as prefixed -- PR 104136 - - - - --- 2022-01-21 Michael Meissner New
Use system default for long double if not specified on PowerPC. Use system default for long double if not specified on PowerPC. - - - - --- 2022-01-12 Michael Meissner New
Allow other languages to change long double format on PowerPC Allow other languages to change long double format on PowerPC - - - - --- 2022-01-12 Michael Meissner New
PR 102935, Fix pr101384-1.c code generation test. PR 102935, Fix pr101384-1.c code generation test. - - - - --- 2022-01-08 Michael Meissner New
PR 103763, Fix fold-vec-splat-floatdouble on power10. PR 103763, Fix fold-vec-splat-floatdouble on power10. - - - - --- 2022-01-07 Michael Meissner New
[3/3] Use absolute switch table addresses for zero cycle moves. Add zero cycle move support - - - - --- 2021-11-19 Michael Meissner New
[2/3] Set power10 fusion if -mtune=power10. Add zero cycle move support - - - - --- 2021-11-19 Michael Meissner New
[1/3] Add power10 zero cycle moves for switches & indirect jumps Add zero cycle move support - - - - --- 2021-11-19 Michael Meissner New
[5/5] Add Power10 XXSPLTIDP for SFmode/DFmode constants. Add Power10 XXSPLTI* and LXVKQ instructions - - - - --- 2021-11-05 Michael Meissner New
[4/5] Add Power10 XXSPLTIDP for vector constants Add Power10 XXSPLTI* and LXVKQ instructions - - - - --- 2021-11-05 Michael Meissner New
[3/5] Add Power10 XXSPLTIW Add Power10 XXSPLTI* and LXVKQ instructions - - - - --- 2021-11-05 Michael Meissner New
[2/5] Add Power10 XXSPLTI* and LXVKQ instructions (LXVKQ) Add Power10 XXSPLTI* and LXVKQ instructions - - - - --- 2021-11-05 Michael Meissner New
[1/5] Add XXSPLTI* and LXVKQ instructions (new data structure and function) Add Power10 XXSPLTI* and LXVKQ instructions - - - - --- 2021-11-05 Michael Meissner New
Fix SFmode subreg of DImode and TImode Fix SFmode subreg of DImode and TImode - - - - --- 2021-09-07 Michael Meissner New
Fix float128-call.c test for power8 IEEE 128 and power10. Fix float128-call.c test for power8 IEEE 128 and power10. - - - - --- 2021-08-25 Michael Meissner New
Generate XXSPLTIDP on power10. Generate XXSPLTIDP on power10. - - - - --- 2021-08-25 Michael Meissner New
Make xxsplti*, xpermx, xxeval be vecperm type. Make xxsplti*, xpermx, xxeval be vecperm type. - - - - --- 2021-08-25 Michael Meissner New
Move xx* builtins to vsx.md. Move xx* builtins to vsx.md. - - - - --- 2021-08-13 Michael Meissner New
Fix xxeval predicates (PR 99921). Fix xxeval predicates (PR 99921). - - - - --- 2021-08-13 Michael Meissner New
Fix tests that require IBM 128-bit long double Fix tests that require IBM 128-bit long double - - - - --- 2021-08-13 Michael Meissner New
Fix typo in fold-vec-load-builtin_vec_xl-* tests. Fix typo in fold-vec-load-builtin_vec_xl-* tests. - - - - --- 2021-08-06 Michael Meissner New
Fix regular expression error in PR 100166 patch Fix regular expression error in PR 100166 patch - - - - --- 2021-07-14 Michael Meissner New
Repost #2: [PATCH] PR 100170: Fix eq/ne tests on power10. Repost #2: [PATCH] PR 100170: Fix eq/ne tests on power10. - - - - --- 2021-07-14 Michael Meissner New
Repost: [PATCH] PR 100168: Fix call test on power10. Repost: [PATCH] PR 100168: Fix call test on power10. - - - - --- 2021-07-07 Michael Meissner New
Repost: [PATCH] PR 100167: Fix vector long long multiply/divide tests on power10 Repost: [PATCH] PR 100167: Fix vector long long multiply/divide tests on power10 - - - - --- 2021-07-07 Michael Meissner New
Repost: [PATCH] Deal with prefixed loads/stores in tests, PR testsuite/100166 Repost: [PATCH] Deal with prefixed loads/stores in tests, PR testsuite/100166 - - - - --- 2021-07-07 Michael Meissner New
Repost: [PATCH] Fix vec-splati-runnable.c test. Repost: [PATCH] Fix vec-splati-runnable.c test. - - - - --- 2021-07-07 Michael Meissner New
Repost: [PATCH] Change rs6000_const_f32_to_i32 return type. Repost: [PATCH] Change rs6000_const_f32_to_i32 return type. - - - - --- 2021-07-07 Michael Meissner New
Repost: [PATCH] Fix long double tests when default long double is not IBM. Repost: [PATCH] Fix long double tests when default long double is not IBM. - - - - --- 2021-07-07 Michael Meissner New
Repost: [PATCH] Generate 128-bit int divide/modulus on power10. Repost: [PATCH] Generate 128-bit int divide/modulus on power10. - - - - --- 2021-07-07 Michael Meissner New
[2/3,V2] Fix IEEE 128-bit min/max test. Untitled series #249538 - - - - --- 2021-06-17 Michael Meissner New
[3/3] Add IEEE 128-bit fp conditional move on PowerPC. Add Power10 IEEE 128-bit min, max, conditional move - - - - --- 2021-06-09 Michael Meissner New
[2/3] Fix IEEE 128-bit min/max test. Add Power10 IEEE 128-bit min, max, conditional move - - - - --- 2021-06-09 Michael Meissner New
[1/3] Add IEEE 128-bit min/max support on PowerPC. Add Power10 IEEE 128-bit min, max, conditional move - - - - --- 2021-06-09 Michael Meissner New
PR 99293: Optimize splat of vec_extract for V2DI/V2DF. PR 99293: Optimize splat of vec_extract for V2DI/V2DF. - - - - --- 2021-06-05 Michael Meissner New
Generate 128-bit divide/modulus Generate 128-bit divide/modulus - - - - --- 2021-06-04 Michael Meissner New
[2/2] Fix tests when running on power10, PR testsuite/100166 : Fix various problems if you configure with --with=power10 - - - - --- 2021-05-18 Michael Meissner New
[1/2] Deal with prefixed loads/stores in tests, PR testsuite/100166 : Fix various problems if you configure with --with=power10 - - - - --- 2021-05-18 Michael Meissner New
Fix vec-splati-runnable.c test. Fix vec-splati-runnable.c test. - - - - --- 2021-05-18 Michael Meissner New
[2/2] Fix xxeval predicates. Move xx* builtins to vsx.md. - - - - --- 2021-05-18 Michael Meissner New
[1/2] Move xx* builtins to vsx.md. Move xx* builtins to vsx.md. - - - - --- 2021-05-18 Michael Meissner New
Change rs6000_const_f32_to_i32 return type. Change rs6000_const_f32_to_i32 return type. - - - - --- 2021-05-18 Michael Meissner New
Allow __ibm128 on older PowerPC systems. Allow __ibm128 on older PowerPC systems. - - - - --- 2021-05-18 Michael Meissner New
Fix long double tests when default long double is not IBM. Fix long double tests when default long double is not IBM. - - - - --- 2021-05-18 Michael Meissner New
[2/2] Add IEEE 128-bit fp conditional move on PowerPC. Add power10 IEEE 128-bit min/max/conditional move support - - - - --- 2021-05-18 Michael Meissner New
[1/2] Add IEEE 128-bit min/max support on PowerPC. Add power10 IEEE 128-bit min/max/conditional move support - - - - --- 2021-05-18 Michael Meissner New
[V2] Define KFmode constants for libgcc. [V2] Define KFmode constants for libgcc. - - - - --- 2021-04-29 Michael Meissner New
Fix PR bootstrap/100327 (_divkf3.c) on PowerPC Fix PR bootstrap/100327 (_divkf3.c) on PowerPC - - - - --- 2021-04-29 Michael Meissner New
Fix Fortran rounding issues, PR fortran/96983. Fix Fortran rounding issues, PR fortran/96983. - - - - --- 2021-04-19 Michael Meissner New
[2/2] Add IEEE 128-bit fp conditional move on PowerPC. Add IEEE 128-bit min/max/conditional move - - - - --- 2021-04-15 Michael Meissner New
[1/2] Add IEEE 128-bit min/max support on PowerPC. Add IEEE 128-bit min/max/conditional move - - - - --- 2021-04-15 Michael Meissner New
Fix logic error in 32-bit trampolines, PR target/98952 Fix logic error in 32-bit trampolines, PR target/98952 - - - - --- 2021-04-09 Michael Meissner New
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