From patchwork Fri Oct 14 08:34:04 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Jiang, Haochen" X-Patchwork-Id: 1689951 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=gcc.gnu.org (client-ip=2620:52:3:1:0:246e:9693:128c; helo=sourceware.org; envelope-from=gcc-patches-bounces+incoming=patchwork.ozlabs.org@gcc.gnu.org; receiver=) Authentication-Results: legolas.ozlabs.org; dkim=pass (1024-bit key; unprotected) header.d=gcc.gnu.org header.i=@gcc.gnu.org header.a=rsa-sha256 header.s=default header.b=AUrq4j0s; dkim-atps=neutral Received: from sourceware.org (server2.sourceware.org [IPv6:2620:52:3:1:0:246e:9693:128c]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature ECDSA (P-384) server-digest SHA384) (No client certificate requested) by legolas.ozlabs.org (Postfix) with ESMTPS id 4Mpfr748B8z23jc for ; Fri, 14 Oct 2022 19:36:39 +1100 (AEDT) Received: from server2.sourceware.org (localhost [IPv6:::1]) by sourceware.org (Postfix) with ESMTP id 90C153857405 for ; Fri, 14 Oct 2022 08:36:37 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org 90C153857405 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gcc.gnu.org; s=default; t=1665736597; bh=5PE1wd1vKLvP3Bv7eE5We6qkUtdl79xt2sPbQMHjLhg=; h=To:Subject:Date:List-Id:List-Unsubscribe:List-Archive:List-Post: List-Help:List-Subscribe:From:Reply-To:Cc:From; b=AUrq4j0suQiBzzc8vfnQ1ZxwuWmBeN1o8fvA/8G4/mo3n1ZZrj0CwDrAg0Hx0s1Oe 7qp9JHOTGviR1YrmHuTun5J3tl2hmsycWKo8toFQE51mvb8QWbWhwHAUAl6CbaYfp7 AsqFbAJRboaZ4XYWuQ9w7FLeaSDRBaWzr2IADubI= X-Original-To: gcc-patches@gcc.gnu.org Delivered-To: gcc-patches@gcc.gnu.org Received: from mga12.intel.com (mga12.intel.com [192.55.52.136]) by sourceware.org (Postfix) with ESMTPS id CD2FF385803D; Fri, 14 Oct 2022 08:36:16 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.1 sourceware.org CD2FF385803D X-IronPort-AV: E=McAfee;i="6500,9779,10499"; a="285046984" X-IronPort-AV: E=Sophos;i="5.95,182,1661842800"; d="scan'208";a="285046984" Received: from orsmga006.jf.intel.com ([10.7.209.51]) by fmsmga106.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 14 Oct 2022 01:36:15 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6500,9779,10499"; a="605300434" X-IronPort-AV: E=Sophos;i="5.95,182,1661842800"; d="scan'208";a="605300434" Received: from shvmail03.sh.intel.com ([10.239.245.20]) by orsmga006.jf.intel.com with ESMTP; 14 Oct 2022 01:36:09 -0700 Received: from shliclel320.sh.intel.com (shliclel320.sh.intel.com [10.239.240.127]) by shvmail03.sh.intel.com (Postfix) with ESMTP id 5BD471009C94; Fri, 14 Oct 2022 16:36:08 +0800 (CST) To: gcc-patches@gcc.gnu.org Subject: [PATCH 0/2] Add a Fourth parameter for prefetch and Support Intel PREFETCHI Date: Fri, 14 Oct 2022 16:34:04 +0800 Message-Id: <20221014083406.8406-1-haochen.jiang@intel.com> X-Mailer: git-send-email 2.18.1 X-Spam-Status: No, score=-5.9 required=5.0 tests=BAYES_00, DKIMWL_WL_HIGH, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, DKIM_VALID_EF, SPF_HELO_PASS, SPF_NONE, TXREP autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: gcc-patches@gcc.gnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Gcc-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-Patchwork-Original-From: Haochen Jiang via Gcc-patches From: "Jiang, Haochen" Reply-To: Haochen Jiang Cc: aoliva@gcc.gnu.org, richard.sandiford@arm.com, uweigand@de.ibm.com, linkw@gcc.gnu.org, gnu@amylaar.uk, dje.gcc@gmail.com, olegendo@gcc.gnu.org, claziss@synopsys.com, segher@kernel.crashing.org, mfortune@gmail.com, davem@redhat.com, dave.anglin@bell.net, hubicka@ucw.cz, richard.earnshaw@arm.com, rguenther@suse.de, marcus.shawcroft@arm.com, ramana.radhakrishnan@arm.com, hongtao.liu@intel.com Errors-To: gcc-patches-bounces+incoming=patchwork.ozlabs.org@gcc.gnu.org Sender: "Gcc-patches" Hi all, Sorry for the previous cover-letter stucking and disturbance and this is the right cover letter. These two patches aimed to add Intel PREFETCHI. The information is based on newly released Intel Architecture Instruction Set Extensions and Future Features. The document comes following: https://www.intel.com/content/www/us/en/develop/download/intel-architecture-instruction-set-extensions-programming-reference.html The first patch added a fourth parameter for prefetch to align with LLVM in middle end. Currently LLVM had a fourth parameter to indicate what is prefetching. Also added a warning on backends that does not support instruction prefetch in machine description file to tell users attempting using prefetchi that the backend will change it to data prefetch. The second patch was i386 specific and added PREFETCHI to i386. Regtested on x86_64-pc-linux-gnu and cross-compiled to other backends. For other backends, I ran through the compile test and no regressions found. Since I did not have machines from other backends, could you kindly help me to test with other machines? I suppose there should not have regressions since I just added a warning to the md file and corresponding testcase. Ok for trunk? BRs, Haochen