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[0/2] Add a Fourth parameter for prefetch and Support Intel PREFETCHI

Message ID 20221014083406.8406-1-haochen.jiang@intel.com
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Series Add a Fourth parameter for prefetch and Support Intel PREFETCHI | expand

Message

Jiang, Haochen Oct. 14, 2022, 8:34 a.m. UTC 
Hi all,

Sorry for the previous cover-letter stucking and disturbance and this
is the right cover letter.

These two patches aimed to add Intel PREFETCHI.

The information is based on newly released
Intel Architecture Instruction Set Extensions and Future Features.

The document comes following:
https://www.intel.com/content/www/us/en/develop/download/intel-architecture-instruction-set-extensions-programming-reference.html

The first patch added a fourth parameter for prefetch to align with LLVM
in middle end. Currently LLVM had a fourth parameter to indicate what is
prefetching. Also added a warning on backends that does not support
instruction prefetch in machine description file to tell users attempting
using prefetchi that the backend will change it to data prefetch.

The second patch was i386 specific and added PREFETCHI to i386.

Regtested on x86_64-pc-linux-gnu and cross-compiled to other backends.
For other backends, I ran through the compile test and no regressions found.
Since I did not have machines from other backends, could you kindly help
me to test with other machines? I suppose there should not have regressions
since I just added a warning to the md file and corresponding testcase.

Ok for trunk?

BRs,
Haochen

Comments

Segher Boessenkool Oct. 19, 2022, 8:49 p.m. UTC | #1 
On Fri, Oct 14, 2022 at 04:34:04PM +0800, Haochen Jiang wrote:
> Sorry for the previous cover-letter stucking and disturbance and this
> is the right cover letter.

Hi!

Nothing in this cover letter tells me why you sent it to me?  Maybe you
shouldn't have at all, just one patch touches Power code, or such?


Segher