From patchwork Tue Jul 25 06:10:51 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sakar Arora X-Patchwork-Id: 793207 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=lists.ubuntu.com (client-ip=91.189.94.19; helo=huckleberry.canonical.com; envelope-from=fwts-devel-bounces@lists.ubuntu.com; receiver=) Received: from huckleberry.canonical.com (huckleberry.canonical.com [91.189.94.19]) by ozlabs.org (Postfix) with ESMTP id 3xGntY2tQGz9s1h; Tue, 25 Jul 2017 16:11:17 +1000 (AEST) Received: from localhost ([127.0.0.1] helo=huckleberry.canonical.com) by huckleberry.canonical.com with esmtp (Exim 4.76) (envelope-from ) id 1dZt3s-0005D5-7f; Tue, 25 Jul 2017 06:11:16 +0000 Received: from foss.arm.com ([217.140.101.70]) by huckleberry.canonical.com with esmtp (Exim 4.76) (envelope-from ) id 1dZt3n-0005BV-Az for fwts-devel@lists.ubuntu.com; Tue, 25 Jul 2017 06:11:11 +0000 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.72.51.249]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id C37CF2B; Mon, 24 Jul 2017 23:11:10 -0700 (PDT) Received: from u201365.usa.Arm.com (a75592.asiapac.arm.com [10.162.2.158]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id F2E8C3F577; Mon, 24 Jul 2017 23:11:08 -0700 (PDT) From: Sakar Arora To: fwts-devel@lists.ubuntu.com Subject: [PATCH 04/10] acpi: dbg2: add SBBR compliance tests Date: Tue, 25 Jul 2017 11:40:51 +0530 Message-Id: <1500963057-4225-5-git-send-email-Sakar.Arora@arm.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1500963057-4225-1-git-send-email-Sakar.Arora@arm.com> References: <1500963057-4225-1-git-send-email-Sakar.Arora@arm.com> Cc: Prasanth.Pulla@arm.com, Mahesh.ReddyBireddy@arm.com, Rajat.Goyal@arm.com, Charles.Garcia-Tobin@arm.com X-BeenThere: fwts-devel@lists.ubuntu.com X-Mailman-Version: 2.1.14 Precedence: list List-Id: Firmware Test Suite Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: fwts-devel-bounces@lists.ubuntu.com Sender: fwts-devel-bounces@lists.ubuntu.com From: Rajat Goyal Server Base Boot Requirements (SBBR) specification is intended for SBSA- compliant 64-bit ARMv8 servers. It defines the base firmware requirements for out-of-box support of any ARM SBSA-compatible Operating System or hypervisor. The requirements in this specification are expected to be minimal yet complete for booting a multi-core ARMv8 server platform, while leaving plenty of room for OEM or ODM innovations and design details. For more information, download the SBBR specification here: http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.den0044b/index.html This change introduces test cases as per SBBR specification to dbg2 table. Signed-off-by: Supreeth Venkatesh Signed-off-by: Rajat Goyal --- src/acpi/dbg2/dbg2.c | 43 ++++++++++++++++++++++++++++++++++++++++--- 1 file changed, 40 insertions(+), 3 deletions(-) diff --git a/src/acpi/dbg2/dbg2.c b/src/acpi/dbg2/dbg2.c index e6f6f09..9aa25c2 100644 --- a/src/acpi/dbg2/dbg2.c +++ b/src/acpi/dbg2/dbg2.c @@ -39,10 +39,46 @@ static int dbg2_init(fwts_framework *fw) return FWTS_ERROR; } if (table == NULL || (table && table->length == 0)) { - fwts_log_error(fw, "ACPI DBG2 table does not exist, skipping test"); - return FWTS_SKIP; + if (fw->flags & FWTS_FLAG_TEST_SBBR) { + fwts_log_error(fw, "ACPI DBG2 table does not exist"); + return FWTS_ERROR; + } else { + fwts_log_error(fw, "ACPI DBG2 table does not exist, skipping test"); + return FWTS_SKIP; + } + } + + return FWTS_OK; +} + +static int dbg2_sbsa_uart_test(fwts_framework *fw) +{ + if (!(fw->flags & FWTS_FLAG_TEST_SBBR)) + return FWTS_OK; + + uint32_t i; + + fwts_acpi_table_dbg2 *dbg2 = (fwts_acpi_table_dbg2 *)table->data; + fwts_acpi_table_dbg2_info *info; + + const int SBBR_DBG2_PORT_SERIAL = 0x8000; + const int SBBR_DBG2_ARM_SBSA_UART = 0x000E; + + info = (fwts_acpi_table_dbg2_info *)(table->data + dbg2->info_offset); + + for (i = 0; i < dbg2->info_count; i++) { + if( (info->port_type == SBBR_DBG2_PORT_SERIAL ) && + (info->port_subtype == SBBR_DBG2_ARM_SBSA_UART) ) + { + fwts_passed(fw, "DBG2 provides a standard serial debug port and describes ARM SBSA Generic UART"); + return FWTS_OK; + } + + /* ..and onto the next info structure .. */ + info = (fwts_acpi_table_dbg2_info *)((uint8_t *)info + info->length); } + fwts_failed(fw, LOG_LEVEL_CRITICAL, "dbg2_sbsa_uart:", "DBG2 provides a non standard debug port"); return FWTS_OK; } @@ -342,6 +378,7 @@ done: } static fwts_framework_minor_test dbg2_tests[] = { + { dbg2_sbsa_uart_test, "DBG2 ARM SBSA Generic UART test," }, { dbg2_test1, "DBG2 (Debug Port Table 2) test." }, { NULL, NULL } }; @@ -352,6 +389,6 @@ static fwts_framework_ops dbg2_ops = { .minor_tests = dbg2_tests }; -FWTS_REGISTER("dbg2", &dbg2_ops, FWTS_TEST_ANYTIME, FWTS_FLAG_BATCH | FWTS_FLAG_TEST_ACPI) +FWTS_REGISTER("dbg2", &dbg2_ops, FWTS_TEST_ANYTIME, FWTS_FLAG_BATCH | FWTS_FLAG_TEST_ACPI | FWTS_FLAG_TEST_SBBR) #endif