From patchwork Fri Dec 16 13:19:29 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Robin Murphy X-Patchwork-Id: 706439 Return-Path: X-Original-To: incoming-dt@patchwork.ozlabs.org Delivered-To: patchwork-incoming-dt@bilbo.ozlabs.org Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 3tg9rs1hLVz9t2b for ; Sat, 17 Dec 2016 00:19:41 +1100 (AEDT) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1757202AbcLPNTj (ORCPT ); Fri, 16 Dec 2016 08:19:39 -0500 Received: from foss.arm.com ([217.140.101.70]:53454 "EHLO foss.arm.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1754718AbcLPNTj (ORCPT ); Fri, 16 Dec 2016 08:19:39 -0500 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.72.51.249]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 9B0BCAD7; Fri, 16 Dec 2016 05:19:38 -0800 (PST) Received: from e104324-lin.cambridge.arm.com (e104324-lin.cambridge.arm.com [10.1.211.71]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id 982393F445; Fri, 16 Dec 2016 05:19:37 -0800 (PST) From: Robin Murphy To: iommu@lists.linux-foundation.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org Cc: will.deacon@arm.com, mark.rutland@arm.com, stuart.yoder@nxp.com Subject: [RFC PATCH] iommu/arm-smmu: Add global SMR masking property Date: Fri, 16 Dec 2016 13:19:29 +0000 Message-Id: X-Mailer: git-send-email 2.10.2.dirty Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org The current SMR masking support using a 2-cell iommu-specifier is primarily intended to handle individual masters with large and/or complex Stream ID assignments; it quickly gets a bit clunky in other SMR use-cases where we just want to consistently mask out the same part of every Stream ID (e.g. for MMU-500 configurations where the appended TBU number gets in the way unnecessarily). Let's add a new property to allow a single global mask value to better fit the latter situation. CC: Stuart Yoder Signed-off-by: Robin Murphy Tested-by: Nipun Gupta --- Compile-tested only... Documentation/devicetree/bindings/iommu/arm,smmu.txt | 8 ++++++++ drivers/iommu/arm-smmu.c | 4 +++- 2 files changed, 11 insertions(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/iommu/arm,smmu.txt b/Documentation/devicetree/bindings/iommu/arm,smmu.txt index e862d1485205..98f5cbe5fdb4 100644 --- a/Documentation/devicetree/bindings/iommu/arm,smmu.txt +++ b/Documentation/devicetree/bindings/iommu/arm,smmu.txt @@ -60,6 +60,14 @@ conditions. aliases of secure registers have to be used during SMMU configuration. +- stream-match-mask : Specifies a fixed SMR mask value to combine with + the Stream ID value from every iommu-specifier. This + may be used instead of an "#iommu-cells" value of 2 + when there is no need for per-master SMR masks, but + it is still desired to mask some portion of every + Stream ID (e.g. for certain MMU-500 configurations + given globally unique external IDs). + ** Deprecated properties: - mmu-masters (deprecated in favour of the generic "iommus" binding) : diff --git a/drivers/iommu/arm-smmu.c b/drivers/iommu/arm-smmu.c index 8f7281444551..f1abcb7dde36 100644 --- a/drivers/iommu/arm-smmu.c +++ b/drivers/iommu/arm-smmu.c @@ -1534,13 +1534,15 @@ static int arm_smmu_domain_set_attr(struct iommu_domain *domain, static int arm_smmu_of_xlate(struct device *dev, struct of_phandle_args *args) { - u32 fwid = 0; + u32 mask, fwid = 0; if (args->args_count > 0) fwid |= (u16)args->args[0]; if (args->args_count > 1) fwid |= (u16)args->args[1] << SMR_MASK_SHIFT; + else if (!of_property_read_u32(args->np, "stream-match-mask", &mask)) + fwid |= (u16)mask << SMR_MASK_SHIFT; return iommu_fwspec_add_ids(dev, &fwid, 1); }