From patchwork Mon Aug 7 07:39:23 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Michal Simek X-Patchwork-Id: 798500 Return-Path: X-Original-To: incoming-dt@patchwork.ozlabs.org Delivered-To: patchwork-incoming-dt@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=vger.kernel.org (client-ip=209.132.180.67; helo=vger.kernel.org; envelope-from=devicetree-owner@vger.kernel.org; receiver=) Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=monstr-eu.20150623.gappssmtp.com header.i=@monstr-eu.20150623.gappssmtp.com header.b="MupgRd8p"; dkim-atps=neutral Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 3xQqDS2mBXz9sQl for ; Mon, 7 Aug 2017 17:39:36 +1000 (AEST) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752339AbdHGHje (ORCPT ); Mon, 7 Aug 2017 03:39:34 -0400 Received: from mail-wr0-f193.google.com ([209.85.128.193]:33338 "EHLO mail-wr0-f193.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752107AbdHGHje (ORCPT ); Mon, 7 Aug 2017 03:39:34 -0400 Received: by mail-wr0-f193.google.com with SMTP id y43so7048418wrd.0 for ; Mon, 07 Aug 2017 00:39:33 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=monstr-eu.20150623.gappssmtp.com; s=20150623; h=sender:from:to:cc:subject:date:message-id; bh=QN7DuE4W3qW89ASVObgP8t/7C2XR50t8nUp7E0hgoCQ=; b=MupgRd8pyGl+y05/NPG+aMrmMiAvrz1+IzTCYzhZcuzkHR0fJTOpwCmfHI92onZ4/T B5oJ10MlKsAk2K8ZaEZZWdjl4s9tcOLu0Lo2AnQ18ERO7Jp0xza2DTh/NdXaGXAnKcUv kg8JU1yd49ZxrBsr2MR7xU+aitgvMVL2leIzwdqnn9TTe80IGl7zEzKiGfXStHi1pPqQ OiLC04Sz8D/yFtGdw4w6BOYd3sqyMWlu6F71UCFRUXeo5ive9zVwqaOPKGbBKIFMglYT GpMc0gqG8SUibaI3e2ND9m+WpQG45NSIbY8kVALffllSgrxt1CWaJxOyG3EhJa0LIreV gRDQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:sender:from:to:cc:subject:date:message-id; bh=QN7DuE4W3qW89ASVObgP8t/7C2XR50t8nUp7E0hgoCQ=; b=RcCEkSJNQyFZ08TtlOQyeHKdLrILT5pGr1X/aS5NvMDGJKIRfMM+elha80BFjAvS6z bFfq8NMWns3xvW9g+O156jO03J7+8c9NQMOgLqbaX6qkZHlZcDBkjiNlI3WaqB8H4jVA pRpGIaG5r7h78ki4NoIVvi6R+Lo1RPKe8wW3pAMVFe62HvoZhdHww35fa8OFaYTXCxL5 5YsMfCljXsPJRQCoiXkRYKyDKRYKMkB7fkJmhxi/fqORJ2H8saFw+xmDONbB0c130s8x QNSf3NWwd4jx5p2FCcSQupYMueY52mkgx7yG5puSa6yUyoH0ccXC4rdODTNGqDF99Sga kDxw== X-Gm-Message-State: AIVw111Bd9Jl32IKjwHrcUn7B+aWG4+imJZtekQDyOFofb2ixf73Tqet bF/r/4cpXyofH79y X-Received: by 10.223.136.178 with SMTP id f47mr8520571wrf.250.1502091573129; Mon, 07 Aug 2017 00:39:33 -0700 (PDT) Received: from localhost (nat-35.starnet.cz. [178.255.168.35]) by smtp.gmail.com with ESMTPSA id p133sm9554428wme.0.2017.08.07.00.39.32 (version=TLS1_2 cipher=AES128-SHA bits=128/128); Mon, 07 Aug 2017 00:39:32 -0700 (PDT) From: Michal Simek To: linux-kernel@vger.kernel.org, monstr@monstr.eu Cc: devicetree@vger.kernel.org, Rob Herring , Mark Rutland Subject: [PATCH v2 1/6] devicetree: Extend synopsys ddrc binding for Xilinx ZynqMP Date: Mon, 7 Aug 2017 09:39:23 +0200 Message-Id: <91fd6532076e4c905b5a228d852bba4941c54a28.1502091561.git.michal.simek@xilinx.com> X-Mailer: git-send-email 1.9.1 Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Add ZynqMP support to Synopsys memory controller. Signed-off-by: Michal Simek Acked-by: Rob Herring --- Changes in v2: - New patch in this series .../devicetree/bindings/memory-controllers/synopsys.txt | 14 +++++++++++++- 1 file changed, 13 insertions(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/memory-controllers/synopsys.txt b/Documentation/devicetree/bindings/memory-controllers/synopsys.txt index a43d26d41e04..08c058d5ad76 100644 --- a/Documentation/devicetree/bindings/memory-controllers/synopsys.txt +++ b/Documentation/devicetree/bindings/memory-controllers/synopsys.txt @@ -5,11 +5,23 @@ configuration. The ECC controller corrects one bit error and detects two bit errors. Required properties: - - compatible: Should be 'xlnx,zynq-ddrc-a05' + - compatible: Should be 'xlnx,zynq-ddrc-a05' for Zynq + and 'xlnx,zynqmp-ddrc-2.40a' for ZynqMP - reg: Base address and size of the controllers memory area + - interrupt-parent: Should be core interrupt controller + valid for ZynqMP DDR Controller + - interrupts: Property with a value describing the interrupt number + valid for ZynqMP DDR Controller Example: memory-controller@f8006000 { compatible = "xlnx,zynq-ddrc-a05"; reg = <0xf8006000 0x1000>; }; + + mc: memory-controller@fd070000 { + compatible = "xlnx,zynqmp-ddrc-2.40a"; + reg = <0x0 0xfd070000 0x0 0x30000>; + interrupt-parent = <&gic>; + interrupts = <0 112 4>; + };