| Message ID | 60ff012d292be895cc2dd058fa78de647ee087c2.1761893824.git.adrianhoyin.ng@altera.com |
|---|---|
| State | New |
| Headers | show |
| Series | i3c: dw: Add Altera SoCFPGA runtime PM disable quirk | expand |
On 31/10/2025 09:27, adrianhoyin.ng@altera.com wrote: > From: Adrian Ng Ho Yin <adrianhoyin.ng@altera.com> > > Add the "altr,socfpga-dw-i3c-master" compatible string to the > Synopsys DesignWare I3C master binding. This allows SoCFPGA > platforms such as Agilex5 to use the generic DW I3C master > controller while applying any required platform-specific quirks. > > Signed-off-by: Adrian Ng Ho Yin <adrianhoyin.ng@altera.com> > --- > .../devicetree/bindings/i3c/snps,dw-i3c-master.yaml | 6 +++++- > 1 file changed, 5 insertions(+), 1 deletion(-) > > diff --git a/Documentation/devicetree/bindings/i3c/snps,dw-i3c-master.yaml b/Documentation/devicetree/bindings/i3c/snps,dw-i3c-master.yaml > index 5f6467375811..b382d3a72bf7 100644 > --- a/Documentation/devicetree/bindings/i3c/snps,dw-i3c-master.yaml > +++ b/Documentation/devicetree/bindings/i3c/snps,dw-i3c-master.yaml > @@ -14,7 +14,11 @@ allOf: > > properties: > compatible: > - const: snps,dw-i3c-master-1.00a > + oneOf: > + - const: snps,dw-i3c-master-1.00a > + - items: > + - const: altr,socfpga-dw-i3c-master You need soc specific compatible (see writing bindings). There is no such SoC as socfpga. Otherwise please point me to the line in the *existing* bindings describing this SoC. Best regards, Krzysztof
diff --git a/Documentation/devicetree/bindings/i3c/snps,dw-i3c-master.yaml b/Documentation/devicetree/bindings/i3c/snps,dw-i3c-master.yaml index 5f6467375811..b382d3a72bf7 100644 --- a/Documentation/devicetree/bindings/i3c/snps,dw-i3c-master.yaml +++ b/Documentation/devicetree/bindings/i3c/snps,dw-i3c-master.yaml @@ -14,7 +14,11 @@ allOf: properties: compatible: - const: snps,dw-i3c-master-1.00a + oneOf: + - const: snps,dw-i3c-master-1.00a + - items: + - const: altr,socfpga-dw-i3c-master + - const: snps,dw-i3c-master-1.00a reg: maxItems: 1