From patchwork Wed May 21 06:59:16 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Appana Durga Kedareswara rao X-Patchwork-Id: 350964 Return-Path: X-Original-To: incoming-dt@patchwork.ozlabs.org Delivered-To: patchwork-incoming-dt@bilbo.ozlabs.org Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 10BF4140081 for ; Wed, 21 May 2014 17:14:45 +1000 (EST) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751131AbaEUHOn (ORCPT ); Wed, 21 May 2014 03:14:43 -0400 Received: from mail-bn1lp0145.outbound.protection.outlook.com ([207.46.163.145]:49047 "EHLO na01-bn1-obe.outbound.protection.outlook.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1751005AbaEUHOm (ORCPT ); Wed, 21 May 2014 03:14:42 -0400 Received: from BL2FFO11FD019.protection.gbl (10.173.160.30) by BL2FFO11HUB066.protection.gbl (10.173.161.166) with Microsoft SMTP Server (TLS) id 15.0.949.9; Wed, 21 May 2014 06:59:28 +0000 Received: from xsj-gw1 (149.199.60.83) by BL2FFO11FD019.mail.protection.outlook.com (10.173.161.37) with Microsoft SMTP Server id 15.0.949.9 via Frontend Transport; Wed, 21 May 2014 06:59:27 +0000 Received: from unknown-38-66.xilinx.com ([149.199.38.66] helo=xsj-smtp1) by xsj-gw1 with esmtp (Exim 4.63) (envelope-from ) id 1Wn0Up-000371-HL; Tue, 20 May 2014 23:59:27 -0700 From: Kedareswara rao Appana To: , , , , , , CC: , , , , Kedareswara rao Appana Subject: [PATCH v8 1/2] can: Add xilinx CAN device tree bindings documentation. Date: Wed, 21 May 2014 12:29:16 +0530 X-Mailer: git-send-email 1.7.4 X-RCIS-Action: ALLOW Message-ID: <59325214-bd7e-4b98-bc0f-c38a9104203b@BL2FFO11FD019.protection.gbl> X-EOPAttributedMessage: 0 X-Forefront-Antispam-Report: CIP:149.199.60.83; CTRY:US; IPV:NLI; IPV:NLI; EFV:NLI; SFV:NSPM; SFS:(6009001)(438001)(199002)(189002)(87936001)(88136002)(21056001)(93916002)(74662001)(87286001)(47776003)(92566001)(20776003)(64706001)(76482001)(33646001)(77156001)(74502001)(86362001)(31696002)(62966002)(31966008)(83072002)(50466002)(89996001)(53416003)(19580395003)(102836001)(80022001)(99396002)(4396001)(70736001)(81342001)(46102001)(85852003)(50986999)(48376002)(81542001)(92726001)(77982001)(50226001)(2201001)(74316001)(44976005)(19580405001)(83322001); DIR:OUT; SFP:; SCL:1; SRVR:BL2FFO11HUB066; H:xsj-gw1; FPR:; MLV:sfv; PTR:unknown-60-83.xilinx.com; A:1; MX:1; LANG:en; MIME-Version: 1.0 X-OriginatorOrg: xilinx.onmicrosoft.com X-Forefront-PRVS: 0218A015FA Received-SPF: Pass (: domain of xilinx.com designates 149.199.60.83 as permitted sender) receiver=; client-ip=149.199.60.83; helo=xsj-gw1; Authentication-Results: spf=pass (sender IP is 149.199.60.83) smtp.mailfrom=appana.durga.rao@xilinx.com; Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Add xilinx CAN bindings documentation. Signed-off-by: Kedareswara rao Appana --- Changes for v8: - None. Changes for v7: - Split the devicetree bindings doc as a seperate patch --- .../devicetree/bindings/net/can/xilinx_can.txt | 44 ++++++++++++++++++++ 1 files changed, 44 insertions(+), 0 deletions(-) create mode 100644 Documentation/devicetree/bindings/net/can/xilinx_can.txt diff --git a/Documentation/devicetree/bindings/net/can/xilinx_can.txt b/Documentation/devicetree/bindings/net/can/xilinx_can.txt new file mode 100644 index 0000000..fe38847 --- /dev/null +++ b/Documentation/devicetree/bindings/net/can/xilinx_can.txt @@ -0,0 +1,44 @@ +Xilinx Axi CAN/Zynq CANPS controller Device Tree Bindings +--------------------------------------------------------- + +Required properties: +- compatible : Should be "xlnx,zynq-can-1.0" for Zynq CAN + controllers and "xlnx,axi-can-1.00.a" for Axi CAN + controllers. +- reg : Physical base address and size of the Axi CAN/Zynq + CANPS registers map. +- interrupts : Property with a value describing the interrupt + number. +- interrupt-parent : Must be core interrupt controller +- clock-names : List of input clock names - "can_clk", "pclk" + (For CANPS), "can_clk" , "s_axi_aclk"(For AXI CAN) + (See clock bindings for details). +- clocks : Clock phandles (see clock bindings for details). +- tx-fifo-depth : Can Tx fifo depth. +- rx-fifo-depth : Can Rx fifo depth. + + +Example: + +For Zynq CANPS Dts file: + zynq_can_0: can@e0008000 { + compatible = "xlnx,zynq-can-1.0"; + clocks = <&clkc 19>, <&clkc 36>; + clock-names = "can_clk", "pclk"; + reg = <0xe0008000 0x1000>; + interrupts = <0 28 4>; + interrupt-parent = <&intc>; + tx-fifo-depth = <0x40>; + rx-fifo-depth = <0x40>; + }; +For Axi CAN Dts file: + axi_can_0: axi-can@40000000 { + compatible = "xlnx,axi-can-1.00.a"; + clocks = <&clkc 0>, <&clkc 1>; + clock-names = "can_clk","s_axi_aclk" ; + reg = <0x40000000 0x10000>; + interrupt-parent = <&intc>; + interrupts = <0 59 1>; + tx-fifo-depth = <0x40>; + rx-fifo-depth = <0x40>; + };