diff mbox

ARM: at91: at91sam9x5: sets NPCS0 (PA14) back to GPIO

Message ID 53D10C50.50305@aksignal.cz
State Superseded, archived
Headers show

Commit Message

Jiri Prchal July 24, 2014, 1:38 p.m. UTC 
After ROMBOOT tries boot from flash on SPI0 NPCS0, this NPCS0 (PA14) remains set to PERIPH_A.
Because of that, this pin is unusable to something else.
This patch sets it back to GPIO.

Signed-off-by: Jiri Prchal <jiri.prchal@aksignal.cz>

Comments

Boris Brezillon July 24, 2014, 2:26 p.m. UTC | #1 
Hello Jiří,

First of all, please try to use git format-patch when submitting a
patch to any kernel mailing list.

On Thu, 24 Jul 2014 15:38:24 +0200
Jiří Prchal <jiri.prchal@aksignal.cz> wrote:

> After ROMBOOT tries boot from flash on SPI0 NPCS0, this NPCS0 (PA14) remains set to PERIPH_A.
> Because of that, this pin is unusable to something else.
> This patch sets it back to GPIO.

The policy is to leave pins in an unknown state till some peripheral
need them.

What are you trying to use this pin for ?
If you just want to use it as a chip select for an spi device, take a
look at [1].

Here the gpio is requested by the spi core when defining the cs-gpios
property. The gpio controller then request the listed pins to the pin
controller (pinctrl driver).

You can explicitly define a new pinctrl state (by defining a new
pinctrl_spi0_cs0 subnode in your dts file) and reference it in the
spi0 node, though this is not mandatory.

Best Regards,

Boris

[1]http://lxr.free-electrons.com/source/arch/arm/boot/dts/at91sam9x5ek.dtsi#L85
Jiri Prchal July 24, 2014, 3:06 p.m. UTC | #2 
Hi,

Dne 24.7.2014 v 16:26 Boris BREZILLON napsal(a):
> Hello Jiří,
>
> First of all, please try to use git format-patch when submitting a
> patch to any kernel mailing list.
Sorry for that.
>
> On Thu, 24 Jul 2014 15:38:24 +0200
> Jiří Prchal <jiri.prchal@aksignal.cz> wrote:
>
>> After ROMBOOT tries boot from flash on SPI0 NPCS0, this NPCS0 (PA14) remains set to PERIPH_A.
>> Because of that, this pin is unusable to something else.
>> This patch sets it back to GPIO.
>
> The policy is to leave pins in an unknown state till some peripheral
> need them.
>
> What are you trying to use this pin for ?
For chip select, but #3. And when SPI communicate with cs0 (PA22), it goes down too (PA14), so 2 devices on bus were 
selected.
> If you just want to use it as a chip select for an spi device, take a
> look at [1].
At [1] it's OK until as cs0 is for example PA22 and cs1 is PA14.
>
> Here the gpio is requested by the spi core when defining the cs-gpios
> property. The gpio controller then request the listed pins to the pin
> controller (pinctrl driver).
GPIO is not set in driver as GPIO, at least I didn't find it.
>
> You can explicitly define a new pinctrl state (by defining a new
> pinctrl_spi0_cs0 subnode in your dts file) and reference it in the
> spi0 node, though this is not mandatory.
>
> Best Regards,
>
> Boris
>
> [1]http://lxr.free-electrons.com/source/arch/arm/boot/dts/at91sam9x5ek.dtsi#L85
>
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Boris Brezillon July 24, 2014, 3:58 p.m. UTC | #3 
On Thu, 24 Jul 2014 17:06:43 +0200
Jiří Prchal <jiri.prchal@aksignal.cz> wrote:

> Hi,
> 
> Dne 24.7.2014 v 16:26 Boris BREZILLON napsal(a):
> > Hello Jiří,
> >
> > First of all, please try to use git format-patch when submitting a
> > patch to any kernel mailing list.
> Sorry for that.
> >
> > On Thu, 24 Jul 2014 15:38:24 +0200
> > Jiří Prchal <jiri.prchal@aksignal.cz> wrote:
> >
> >> After ROMBOOT tries boot from flash on SPI0 NPCS0, this NPCS0 (PA14) remains set to PERIPH_A.
> >> Because of that, this pin is unusable to something else.
> >> This patch sets it back to GPIO.
> >
> > The policy is to leave pins in an unknown state till some peripheral
> > need them.
> >
> > What are you trying to use this pin for ?
> For chip select, but #3. And when SPI communicate with cs0 (PA22), it goes down too (PA14), so 2 devices on bus were 
> selected.

Are you using a 9x5ek board or a custom one, in the latter case could
you paste your spi0 node definition ?

> > If you just want to use it as a chip select for an spi device, take a
> > look at [1].
> At [1] it's OK until as cs0 is for example PA22 and cs1 is PA14.

If you want PA14 to control cs1 and PA22 to control cs0 (both
configured as GPIOs), you'll have the following definition:

cs-gpios = <&pioA 22 0>, <&pioA 14 0>, <0>, <0>;

> >
> > Here the gpio is requested by the spi core when defining the cs-gpios
> > property. The gpio controller then request the listed pins to the pin
> > controller (pinctrl driver).
> GPIO is not set in driver as GPIO, at least I didn't find it.

Take a look at [1], which is set as the gpio_request_enable callback,
called by pinctrl core when a gpio is requested.


[1]http://lxr.free-electrons.com/source/drivers/pinctrl/pinctrl-at91.c#L665
Jiri Prchal July 25, 2014, 6:14 a.m. UTC | #4 
Dne 24.7.2014 v 17:58 Boris BREZILLON napsal(a):
> On Thu, 24 Jul 2014 17:06:43 +0200
> Jiří Prchal <jiri.prchal@aksignal.cz> wrote:
>
>> Hi,
>>
>> Dne 24.7.2014 v 16:26 Boris BREZILLON napsal(a):
>>> Hello Jiří,
>>>
>>> First of all, please try to use git format-patch when submitting a
>>> patch to any kernel mailing list.
>> Sorry for that.
>>>
>>> On Thu, 24 Jul 2014 15:38:24 +0200
>>> Jiří Prchal <jiri.prchal@aksignal.cz> wrote:
>>>
>>>> After ROMBOOT tries boot from flash on SPI0 NPCS0, this NPCS0 (PA14) remains set to PERIPH_A.
>>>> Because of that, this pin is unusable to something else.
>>>> This patch sets it back to GPIO.
>>>
>>> The policy is to leave pins in an unknown state till some peripheral
>>> need them.
>>>
>>> What are you trying to use this pin for ?
>> For chip select, but #3. And when SPI communicate with cs0 (PA22), it goes down too (PA14), so 2 devices on bus were
>> selected.
>
> Are you using a 9x5ek board or a custom one, in the latter case could
> you paste your spi0 node definition ?
I'm using custom board. My spi node:
			spi0: spi@f0000000 {
				status = "okay";
				cs-gpios = <&pioA 23 0
					    &pioA 22 0
					    &pioC 29 0
					    &pioA 14 0>;

				fm25@0 {
					compatible = "cypress,fm25";
					spi-max-frequency = <40000000>;
					reg = <0>;
					pagesize = <256>;
					size = <131072>;
					address-width = <24>;
				};
				/* ADC */
				spidev@1 {
					compatible = "spidev";
					reg = <1>;
					spi-max-frequency = <1000000>;
				};
				/* IO expander for busaddr */
				spidev@2 {
					compatible = "spidev";
					reg = <2>;
					label = "busaddr";
					spi-max-frequency = <10000000>;
				};
				/* audio codec */
				codec: codec@3 {
					compatible = "ti,tlv320aic3x";
					spi-max-frequency = <1000000>;
					reg = <3>;
				};
			};

This does not work without patch, because of 2 chips selected at one time because of PA14 is periph_a. Probably ROMBOOT 
changes that.
>
>>> If you just want to use it as a chip select for an spi device, take a
>>> look at [1].
>> At [1] it's OK until as cs0 is for example PA22 and cs1 is PA14.
>
> If you want PA14 to control cs1 and PA22 to control cs0 (both
> configured as GPIOs), you'll have the following definition:
>
> cs-gpios = <&pioA 22 0>, <&pioA 14 0>, <0>, <0>;
See my node.
>
>>>
>>> Here the gpio is requested by the spi core when defining the cs-gpios
>>> property. The gpio controller then request the listed pins to the pin
>>> controller (pinctrl driver).
>> GPIO is not set in driver as GPIO, at least I didn't find it.
>
> Take a look at [1], which is set as the gpio_request_enable callback,
> called by pinctrl core when a gpio is requested.
But is this called from spi driver when requesting gpios as cs?
>
>
> [1]http://lxr.free-electrons.com/source/drivers/pinctrl/pinctrl-at91.c#L665
>
>
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Boris Brezillon July 25, 2014, 7:53 a.m. UTC | #5 
On Fri, 25 Jul 2014 08:14:40 +0200
Jiří Prchal <jiri.prchal@aksignal.cz> wrote:

> 
> 
> Dne 24.7.2014 v 17:58 Boris BREZILLON napsal(a):
> > On Thu, 24 Jul 2014 17:06:43 +0200
> > Jiří Prchal <jiri.prchal@aksignal.cz> wrote:
> >
> >> Hi,
> >>
> >> Dne 24.7.2014 v 16:26 Boris BREZILLON napsal(a):
> >>> Hello Jiří,
> >>>
> >>> First of all, please try to use git format-patch when submitting a
> >>> patch to any kernel mailing list.
> >> Sorry for that.
> >>>
> >>> On Thu, 24 Jul 2014 15:38:24 +0200
> >>> Jiří Prchal <jiri.prchal@aksignal.cz> wrote:
> >>>
> >>>> After ROMBOOT tries boot from flash on SPI0 NPCS0, this NPCS0 (PA14) remains set to PERIPH_A.
> >>>> Because of that, this pin is unusable to something else.
> >>>> This patch sets it back to GPIO.
> >>>
> >>> The policy is to leave pins in an unknown state till some peripheral
> >>> need them.
> >>>
> >>> What are you trying to use this pin for ?
> >> For chip select, but #3. And when SPI communicate with cs0 (PA22), it goes down too (PA14), so 2 devices on bus were
> >> selected.
> >
> > Are you using a 9x5ek board or a custom one, in the latter case could
> > you paste your spi0 node definition ?
> I'm using custom board. My spi node:
> 			spi0: spi@f0000000 {
> 				status = "okay";
> 				cs-gpios = <&pioA 23 0
> 					    &pioA 22 0
> 					    &pioC 29 0
> 					    &pioA 14 0>;
> 
> 				fm25@0 {
> 					compatible = "cypress,fm25";
> 					spi-max-frequency = <40000000>;
> 					reg = <0>;
> 					pagesize = <256>;
> 					size = <131072>;
> 					address-width = <24>;
> 				};
> 				/* ADC */
> 				spidev@1 {
> 					compatible = "spidev";
> 					reg = <1>;
> 					spi-max-frequency = <1000000>;
> 				};
> 				/* IO expander for busaddr */
> 				spidev@2 {
> 					compatible = "spidev";
> 					reg = <2>;
> 					label = "busaddr";
> 					spi-max-frequency = <10000000>;
> 				};
> 				/* audio codec */
> 				codec: codec@3 {
> 					compatible = "ti,tlv320aic3x";
> 					spi-max-frequency = <1000000>;
> 					reg = <3>;
> 				};
> 			};
> 
> This does not work without patch, because of 2 chips selected at one time because of PA14 is periph_a. Probably ROMBOOT 
> changes that.

Yes, boot code stored in ROM probably mux PA14 to periph A function,
but with your definition PA 14 should be set GPIO mode when the codec
device is created.

I don't see any obvious error in your definition, could you add a trace
there [1] to see if the gpio is successfully requested ?
Could you also paste the content of /sys/kernel/debug/gpio ?

> >
> >>> If you just want to use it as a chip select for an spi device, take a
> >>> look at [1].
> >> At [1] it's OK until as cs0 is for example PA22 and cs1 is PA14.
> >
> > If you want PA14 to control cs1 and PA22 to control cs0 (both
> > configured as GPIOs), you'll have the following definition:
> >
> > cs-gpios = <&pioA 22 0>, <&pioA 14 0>, <0>, <0>;
> See my node.
> >
> >>>
> >>> Here the gpio is requested by the spi core when defining the cs-gpios
> >>> property. The gpio controller then request the listed pins to the pin
> >>> controller (pinctrl driver).
> >> GPIO is not set in driver as GPIO, at least I didn't find it.
> >
> > Take a look at [1], which is set as the gpio_request_enable callback,
> > called by pinctrl core when a gpio is requested.
> But is this called from spi driver when requesting gpios as cs?

Yes, it's part of the gpio_request process:
gpio_request calls request method on at91 gpio_chip which in turn
calls pinctrl_request_gpio which then calls the gpio_request_enable
method I previously mentioned.


Best Regards,

Boris

[1]http://lxr.free-electrons.com/source/drivers/spi/spi-atmel.c#L1031
Jiri Prchal July 25, 2014, 8:27 a.m. UTC | #6 
Dne 25.7.2014 v 09:53 Boris BREZILLON napsal(a):
> On Fri, 25 Jul 2014 08:14:40 +0200
> Jiří Prchal <jiri.prchal@aksignal.cz> wrote:
>
>>
>>
>> Dne 24.7.2014 v 17:58 Boris BREZILLON napsal(a):
>>> On Thu, 24 Jul 2014 17:06:43 +0200
>>> Jiří Prchal <jiri.prchal@aksignal.cz> wrote:
>>>
>>>> Hi,
>>>>
>>>> Dne 24.7.2014 v 16:26 Boris BREZILLON napsal(a):
>>>>> Hello Jiří,
>>>>>
>>>>> First of all, please try to use git format-patch when submitting a
>>>>> patch to any kernel mailing list.
>>>> Sorry for that.
>>>>>
>>>>> On Thu, 24 Jul 2014 15:38:24 +0200
>>>>> Jiří Prchal <jiri.prchal@aksignal.cz> wrote:
>>>>>
>>>>>> After ROMBOOT tries boot from flash on SPI0 NPCS0, this NPCS0 (PA14) remains set to PERIPH_A.
>>>>>> Because of that, this pin is unusable to something else.
>>>>>> This patch sets it back to GPIO.
>>>>>
>>>>> The policy is to leave pins in an unknown state till some peripheral
>>>>> need them.
>>>>>
>>>>> What are you trying to use this pin for ?
>>>> For chip select, but #3. And when SPI communicate with cs0 (PA22), it goes down too (PA14), so 2 devices on bus were
>>>> selected.
>>>
>>> Are you using a 9x5ek board or a custom one, in the latter case could
>>> you paste your spi0 node definition ?
>> I'm using custom board. My spi node:
>> 			spi0: spi@f0000000 {
>> 				status = "okay";
>> 				cs-gpios = <&pioA 23 0
>> 					    &pioA 22 0
>> 					    &pioC 29 0
>> 					    &pioA 14 0>;
>>
>> 				fm25@0 {
>> 					compatible = "cypress,fm25";
>> 					spi-max-frequency = <40000000>;
>> 					reg = <0>;
>> 					pagesize = <256>;
>> 					size = <131072>;
>> 					address-width = <24>;
>> 				};
>> 				/* ADC */
>> 				spidev@1 {
>> 					compatible = "spidev";
>> 					reg = <1>;
>> 					spi-max-frequency = <1000000>;
>> 				};
>> 				/* IO expander for busaddr */
>> 				spidev@2 {
>> 					compatible = "spidev";
>> 					reg = <2>;
>> 					label = "busaddr";
>> 					spi-max-frequency = <10000000>;
>> 				};
>> 				/* audio codec */
>> 				codec: codec@3 {
>> 					compatible = "ti,tlv320aic3x";
>> 					spi-max-frequency = <1000000>;
>> 					reg = <3>;
>> 				};
>> 			};
>>
>> This does not work without patch, because of 2 chips selected at one time because of PA14 is periph_a. Probably ROMBOOT
>> changes that.
>
> Yes, boot code stored in ROM probably mux PA14 to periph A function,
> but with your definition PA 14 should be set GPIO mode when the codec
> device is created.
I tried codec defined as spidev to see if it is not in codec driver, but its the same.
				/* audio codec */
				spidev@3 {
					compatible = "spidev";
					reg = <3>;
					label = "codec";
					spi-max-frequency = <10000000>;
				};

>
> I don't see any obvious error in your definition, could you add a trace
> there [1] to see if the gpio is successfully requested ?
I add a trace:
@@ -1029,6 +1029,7 @@ static int atmel_spi_setup(struct spi_device *spi)
  		if (!asd)
  			return -ENOMEM;

+		dev_dbg(&spi->dev, "gpio_request: %u\n", npcs_pin);
  		ret = gpio_request(npcs_pin, dev_name(&spi->dev));
  		if (ret) {
  			kfree(asd);
But don't see it.
/ # dmesg | grep spi
[    1.167968] atmel_spi f0000000.spi: version: 0x212
[    1.175781] atmel_spi f0000000.spi: Using dma0chan1 (tx) and dma0chan2 (rx) for DMA transfers
[    1.183593] atmel_spi f0000000.spi: Atmel SPI Controller at 0xf0000000 (irq 34)
/ # dmesg | grep gpio_request
/ # dmesg | grep gpio
[    0.121093] gpiochip_add: registered GPIOs 0 to 31 on device: fffff400.gpio
[    0.121093] gpio-at91 fffff400.gpio: at address fefff400
[    0.125000] gpiochip_add: registered GPIOs 32 to 50 on device: fffff600.gpio
[    0.125000] gpio-at91 fffff600.gpio: at address fefff600
[    0.125000] gpiochip_add: registered GPIOs 64 to 95 on device: fffff800.gpio
[    0.125000] gpio-at91 fffff800.gpio: at address fefff800
[    0.128906] gpiochip_add: registered GPIOs 96 to 117 on device: fffffa00.gpio
[    0.128906] gpio-at91 fffffa00.gpio: at address fefffa00
[    0.304687] of_get_named_gpiod_flags exited with status 0
[    0.304687] gpio-of-helper gpio: Allocated GPIO id=-1
[    0.304687] of_get_named_gpiod_flags exited with status 0
[    0.304687] gpio-of-helper gpio: Allocated GPIO id=-1
[    0.304687] of_get_named_gpiod_flags exited with status 0
[    0.308593] gpio-of-helper gpio: Allocated GPIO id=-1
[    0.308593] of_get_named_gpiod_flags exited with status 0
[    0.308593] gpio-of-helper gpio: Allocated GPIO id=-1
[    0.308593] of_get_named_gpiod_flags exited with status 0
[    0.308593] gpio-of-helper gpio: Allocated GPIO id=-1
[    0.312500] of_get_named_gpiod_flags exited with status 0
[    0.312500] gpio-of-helper gpio: Allocated GPIO id=-1
[    0.312500] of_get_named_gpiod_flags exited with status 0
[    0.312500] gpio-of-helper gpio: Allocated GPIO id=-1
[    0.312500] of_get_named_gpiod_flags exited with status 0
[    0.312500] gpio-of-helper gpio: Allocated GPIO id=-1
[    0.312500] of_get_named_gpiod_flags exited with status 0
[    0.316406] gpio-of-helper gpio: Allocated GPIO id=-1
[    0.316406] of_get_named_gpiod_flags exited with status 0
[    0.316406] gpio-of-helper gpio: Allocated GPIO id=-1
[    0.316406] of_get_named_gpiod_flags exited with status 0
[    0.316406] gpio-of-helper gpio: Allocated GPIO id=-1
[    0.316406] of_get_named_gpiod_flags exited with status 0
[    0.320312] gpio-of-helper gpio: Allocated GPIO id=-1
[    0.320312] of_get_named_gpiod_flags exited with status 0
[    0.320312] gpio-of-helper gpio: Allocated GPIO id=-1
[    0.320312] of_get_named_gpiod_flags exited with status 0
[    0.324218] gpio-of-helper gpio: Allocated GPIO id=-1
[    0.324218] of_get_named_gpiod_flags exited with status 0
[    0.324218] gpio-of-helper gpio: Allocated GPIO id=-1
[    0.324218] gpio-of-helper gpio: ready
[    0.328125] of_get_named_gpiod_flags: can't parse gpios property of node '/ahb/apb/serial@fffff200[0]'
[    0.328125] of_get_named_gpiod_flags: can't parse gpios property of node '/ahb/apb/serial@fffff200[0]'
[    0.328125] of_get_named_gpiod_flags: can't parse gpios property of node '/ahb/apb/serial@fffff200[0]'
[    0.328125] of_get_named_gpiod_flags: can't parse gpios property of node '/ahb/apb/serial@fffff200[0]'
[    0.328125] of_get_named_gpiod_flags: can't parse gpios property of node '/ahb/apb/serial@fffff200[0]'
[    0.328125] of_get_named_gpiod_flags: can't parse gpios property of node '/ahb/apb/serial@fffff200[0]'
[    0.328125] of_get_named_gpiod_flags: can't parse gpios property of node '/ahb/apb/serial@fffff200[0]'
[    0.328125] of_get_named_gpiod_flags: can't parse gpios property of node '/ahb/apb/serial@fffff200[0]'
[    0.328125] of_get_named_gpiod_flags: can't parse gpios property of node '/ahb/apb/serial@fffff200[0]'
[    0.328125] of_get_named_gpiod_flags: can't parse gpios property of node '/ahb/apb/serial@fffff200[0]'
[    0.328125] of_get_named_gpiod_flags: can't parse gpios property of node '/ahb/apb/serial@fffff200[0]'
[    0.328125] of_get_named_gpiod_flags: can't parse gpios property of node '/ahb/apb/serial@fffff200[0]'
[    0.332031] of_get_named_gpiod_flags: can't parse gpios property of node '/ahb/apb/serial@fffff200[0]'
[    0.332031] of_get_named_gpiod_flags: can't parse gpios property of node '/ahb/apb/serial@fffff200[0]'
[    0.332031] of_get_named_gpiod_flags: can't parse gpios property of node '/ahb/apb/serial@fffff200[0]'
[    0.332031] of_get_named_gpiod_flags: can't parse gpios property of node '/ahb/apb/serial@fffff200[0]'
[    0.847656] of_get_named_gpiod_flags: can't parse gpios property of node '/ahb/apb/serial@f801c000[0]'
[    0.847656] of_get_named_gpiod_flags: can't parse gpios property of node '/ahb/apb/serial@f801c000[0]'
[    0.847656] of_get_named_gpiod_flags: can't parse gpios property of node '/ahb/apb/serial@f801c000[0]'
[    0.847656] of_get_named_gpiod_flags: can't parse gpios property of node '/ahb/apb/serial@f801c000[0]'
[    0.847656] of_get_named_gpiod_flags: can't parse gpios property of node '/ahb/apb/serial@f801c000[0]'
[    0.847656] of_get_named_gpiod_flags: can't parse gpios property of node '/ahb/apb/serial@f801c000[0]'
[    0.847656] of_get_named_gpiod_flags: can't parse gpios property of node '/ahb/apb/serial@f801c000[0]'
[    0.847656] of_get_named_gpiod_flags: can't parse gpios property of node '/ahb/apb/serial@f801c000[0]'
[    0.851562] of_get_named_gpiod_flags: can't parse gpios property of node '/ahb/apb/serial@f801c000[0]'
[    0.851562] of_get_named_gpiod_flags: can't parse gpios property of node '/ahb/apb/serial@f801c000[0]'
[    0.851562] of_get_named_gpiod_flags: can't parse gpios property of node '/ahb/apb/serial@f801c000[0]'
[    0.851562] of_get_named_gpiod_flags: can't parse gpios property of node '/ahb/apb/serial@f801c000[0]'
[    0.851562] of_get_named_gpiod_flags: can't parse gpios property of node '/ahb/apb/serial@f801c000[0]'
[    0.851562] of_get_named_gpiod_flags: can't parse gpios property of node '/ahb/apb/serial@f801c000[0]'
[    0.851562] of_get_named_gpiod_flags: can't parse gpios property of node '/ahb/apb/serial@f801c000[0]'
[    0.851562] of_get_named_gpiod_flags: can't parse gpios property of node '/ahb/apb/serial@f801c000[0]'
[    0.863281] of_get_named_gpiod_flags: can't parse gpios property of node '/ahb/apb/serial@f8020000[0]'
[    0.863281] of_get_named_gpiod_flags: can't parse gpios property of node '/ahb/apb/serial@f8020000[0]'
[    0.863281] of_get_named_gpiod_flags: can't parse gpios property of node '/ahb/apb/serial@f8020000[0]'
[    0.863281] of_get_named_gpiod_flags: can't parse gpios property of node '/ahb/apb/serial@f8020000[0]'
[    0.863281] of_get_named_gpiod_flags: can't parse gpios property of node '/ahb/apb/serial@f8020000[0]'
[    0.863281] of_get_named_gpiod_flags: can't parse gpios property of node '/ahb/apb/serial@f8020000[0]'
[    0.863281] of_get_named_gpiod_flags: can't parse gpios property of node '/ahb/apb/serial@f8020000[0]'
[    0.863281] of_get_named_gpiod_flags: can't parse gpios property of node '/ahb/apb/serial@f8020000[0]'
[    0.863281] of_get_named_gpiod_flags: can't parse gpios property of node '/ahb/apb/serial@f8020000[0]'
[    0.863281] of_get_named_gpiod_flags: can't parse gpios property of node '/ahb/apb/serial@f8020000[0]'
[    0.863281] of_get_named_gpiod_flags: can't parse gpios property of node '/ahb/apb/serial@f8020000[0]'
[    0.863281] of_get_named_gpiod_flags: can't parse gpios property of node '/ahb/apb/serial@f8020000[0]'
[    0.863281] of_get_named_gpiod_flags: can't parse gpios property of node '/ahb/apb/serial@f8020000[0]'
[    0.863281] of_get_named_gpiod_flags: can't parse gpios property of node '/ahb/apb/serial@f8020000[0]'
[    0.863281] of_get_named_gpiod_flags: can't parse gpios property of node '/ahb/apb/serial@f8020000[0]'
[    0.863281] of_get_named_gpiod_flags: can't parse gpios property of node '/ahb/apb/serial@f8020000[0]'
[    0.875000] of_get_named_gpiod_flags: can't parse gpios property of node '/ahb/apb/serial@f8024000[0]'
[    0.875000] of_get_named_gpiod_flags: can't parse gpios property of node '/ahb/apb/serial@f8024000[0]'
[    0.875000] of_get_named_gpiod_flags: can't parse gpios property of node '/ahb/apb/serial@f8024000[0]'
[    0.875000] of_get_named_gpiod_flags: can't parse gpios property of node '/ahb/apb/serial@f8024000[0]'
[    0.875000] of_get_named_gpiod_flags: can't parse gpios property of node '/ahb/apb/serial@f8024000[0]'
[    0.875000] of_get_named_gpiod_flags: can't parse gpios property of node '/ahb/apb/serial@f8024000[0]'
[    0.875000] of_get_named_gpiod_flags: can't parse gpios property of node '/ahb/apb/serial@f8024000[0]'
[    0.878906] of_get_named_gpiod_flags: can't parse gpios property of node '/ahb/apb/serial@f8024000[0]'
[    0.878906] of_get_named_gpiod_flags: can't parse gpios property of node '/ahb/apb/serial@f8024000[0]'
[    0.878906] of_get_named_gpiod_flags: can't parse gpios property of node '/ahb/apb/serial@f8024000[0]'
[    0.878906] of_get_named_gpiod_flags: can't parse gpios property of node '/ahb/apb/serial@f8024000[0]'
[    0.878906] of_get_named_gpiod_flags: can't parse gpios property of node '/ahb/apb/serial@f8024000[0]'
[    0.878906] of_get_named_gpiod_flags: can't parse gpios property of node '/ahb/apb/serial@f8024000[0]'
[    0.878906] of_get_named_gpiod_flags: can't parse gpios property of node '/ahb/apb/serial@f8024000[0]'
[    0.878906] of_get_named_gpiod_flags: can't parse gpios property of node '/ahb/apb/serial@f8024000[0]'
[    0.878906] of_get_named_gpiod_flags: can't parse gpios property of node '/ahb/apb/serial@f8024000[0]'
[    0.890625] of_get_named_gpiod_flags: can't parse gpios property of node '/ahb/apb/serial@f8028000[0]'
[    0.890625] of_get_named_gpiod_flags: can't parse gpios property of node '/ahb/apb/serial@f8028000[0]'
[    0.890625] of_get_named_gpiod_flags: can't parse gpios property of node '/ahb/apb/serial@f8028000[0]'
[    0.890625] of_get_named_gpiod_flags: can't parse gpios property of node '/ahb/apb/serial@f8028000[0]'
[    0.890625] of_get_named_gpiod_flags: can't parse gpios property of node '/ahb/apb/serial@f8028000[0]'
[    0.890625] of_get_named_gpiod_flags: can't parse gpios property of node '/ahb/apb/serial@f8028000[0]'
[    0.890625] of_get_named_gpiod_flags: can't parse gpios property of node '/ahb/apb/serial@f8028000[0]'
[    0.890625] of_get_named_gpiod_flags: can't parse gpios property of node '/ahb/apb/serial@f8028000[0]'
[    0.890625] of_get_named_gpiod_flags: can't parse gpios property of node '/ahb/apb/serial@f8028000[0]'
[    0.890625] of_get_named_gpiod_flags: can't parse gpios property of node '/ahb/apb/serial@f8028000[0]'
[    0.890625] of_get_named_gpiod_flags: can't parse gpios property of node '/ahb/apb/serial@f8028000[0]'
[    0.890625] of_get_named_gpiod_flags: can't parse gpios property of node '/ahb/apb/serial@f8028000[0]'
[    0.890625] of_get_named_gpiod_flags: can't parse gpios property of node '/ahb/apb/serial@f8028000[0]'
[    0.890625] of_get_named_gpiod_flags: can't parse gpios property of node '/ahb/apb/serial@f8028000[0]'
[    0.890625] of_get_named_gpiod_flags: can't parse gpios property of node '/ahb/apb/serial@f8028000[0]'
[    0.890625] of_get_named_gpiod_flags: can't parse gpios property of node '/ahb/apb/serial@f8028000[0]'
[    0.929687] of_get_named_gpiod_flags exited with status 0
[    0.929687] of_get_named_gpiod_flags exited with status 0
[    0.929687] of_get_named_gpiod_flags: can't parse gpios property of node '/ahb/nand@40000000[2]'
[    1.191406] of_get_named_gpiod_flags exited with status 0
[    1.191406] of_get_named_gpiod_flags exited with status 0
[    1.191406] of_get_named_gpiod_flags exited with status 0
[    1.191406] of_get_named_gpiod_flags exited with status 0
[    1.437500] of_get_named_gpiod_flags: can't parse gpios property of node '/ahb/ohci@00600000[0]'
[    1.437500] of_get_named_gpiod_flags: can't parse gpios property of node '/ahb/ohci@00600000[1]'
[    1.437500] of_get_named_gpiod_flags: can't parse gpios property of node '/ahb/ohci@00600000[2]'
[    1.437500] of_get_named_gpiod_flags: can't parse gpios property of node '/ahb/ohci@00600000[0]'
[    1.437500] of_get_named_gpiod_flags: can't parse gpios property of node '/ahb/ohci@00600000[1]'
[    1.437500] of_get_named_gpiod_flags: can't parse gpios property of node '/ahb/ohci@00600000[2]'
[    1.609375] of_get_named_gpiod_flags exited with status 0
[    1.699218] of_get_named_gpiod_flags exited with status 0
[    1.699218] of_get_named_gpiod_flags exited with status 0
[    1.699218] of_get_named_gpiod_flags exited with status 0
[    1.699218] of_get_named_gpiod_flags exited with status 0
[    1.699218] of_get_named_gpiod_flags exited with status 0
[    1.699218] of_get_named_gpiod_flags exited with status 0
[    1.699218] of_get_named_gpiod_flags exited with status 0
[    1.703125] of_get_named_gpiod_flags exited with status 0
[    3.042968] of_get_named_gpiod_flags: can't parse gpios property of node '/ahb/apb/mmc@f0008000/slot@0[0]'
[    3.042968] of_get_named_gpiod_flags: can't parse gpios property of node '/ahb/apb/mmc@f0008000/slot@0[0]'


> Could you also paste the content of /sys/kernel/debug/gpio ?
The /sys/kernel/debug/ is empty.
It's set in config:
---GPIOSupport
  │       [*]   Debug GPIO calls │
  │
But in .config not:
# CONFIG_SPI_DEBUG is not set

>
>>>
>>>>> If you just want to use it as a chip select for an spi device, take a
>>>>> look at [1].
>>>> At [1] it's OK until as cs0 is for example PA22 and cs1 is PA14.
>>>
>>> If you want PA14 to control cs1 and PA22 to control cs0 (both
>>> configured as GPIOs), you'll have the following definition:
>>>
>>> cs-gpios = <&pioA 22 0>, <&pioA 14 0>, <0>, <0>;
>> See my node.
>>>
>>>>>
>>>>> Here the gpio is requested by the spi core when defining the cs-gpios
>>>>> property. The gpio controller then request the listed pins to the pin
>>>>> controller (pinctrl driver).
>>>> GPIO is not set in driver as GPIO, at least I didn't find it.
>>>
>>> Take a look at [1], which is set as the gpio_request_enable callback,
>>> called by pinctrl core when a gpio is requested.
>> But is this called from spi driver when requesting gpios as cs?
>
> Yes, it's part of the gpio_request process:
> gpio_request calls request method on at91 gpio_chip which in turn
> calls pinctrl_request_gpio which then calls the gpio_request_enable
> method I previously mentioned.
>
>
> Best Regards,
>
> Boris
>
> [1]http://lxr.free-electrons.com/source/drivers/spi/spi-atmel.c#L1031
>
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Alexandre Belloni July 25, 2014, 8:30 a.m. UTC | #7 
Hi,

On 25/07/2014 at 08:14:40 +0200, Jiří Prchal wrote :
> I'm using custom board. My spi node:
> 			spi0: spi@f0000000 {

You should override the pinctrl here as you are using gpios for the cs.
				pinctrl-0 = <&pinctrl_spi0_custom>;

> 				status = "okay";
> 				cs-gpios = <&pioA 23 0
> 					    &pioA 22 0
> 					    &pioC 29 0
> 					    &pioA 14 0>;
> 

		pinctrl@fffff400 {
				spi0 {
					 pinctrl_spi0_custom: spi0-custom {
							 atmel,pins =
									 <AT91_PIOA 23 AT91_PERIPH_GPIO AT91_PINCTRL_NONE>,
									 <AT91_PIOA 22 AT91_PERIPH_GPIO AT91_PINCTRL_NONE>,
									 <AT91_PIOC 29 AT91_PERIPH_GPIO AT91_PINCTRL_NONE>,
									 <AT91_PIOA 14 AT91_PERIPH_GPIO AT91_PINCTRL_NONE>;
					 };
				};
		};
Jiri Prchal July 25, 2014, 8:33 a.m. UTC | #8 
I changed manually .config,
now it's there:
[    1.195312] spi spi0.0: gpio_request: 23
[    1.195312] spi spi0.1: gpio_request: 22
[    1.199218] spi spi0.2: gpio_request: 93
[    1.203125] spi spi0.3: gpio_request: 14

But still not working.

Dne 25.7.2014 v 09:53 Boris BREZILLON napsal(a):
> On Fri, 25 Jul 2014 08:14:40 +0200
> Jiří Prchal <jiri.prchal@aksignal.cz> wrote:
>
>>
>>
>> Dne 24.7.2014 v 17:58 Boris BREZILLON napsal(a):
>>> On Thu, 24 Jul 2014 17:06:43 +0200
>>> Jiří Prchal <jiri.prchal@aksignal.cz> wrote:
>>>
>>>> Hi,
>>>>
>>>> Dne 24.7.2014 v 16:26 Boris BREZILLON napsal(a):
>>>>> Hello Jiří,
>>>>>
>>>>> First of all, please try to use git format-patch when submitting a
>>>>> patch to any kernel mailing list.
>>>> Sorry for that.
>>>>>
>>>>> On Thu, 24 Jul 2014 15:38:24 +0200
>>>>> Jiří Prchal <jiri.prchal@aksignal.cz> wrote:
>>>>>
>>>>>> After ROMBOOT tries boot from flash on SPI0 NPCS0, this NPCS0 (PA14) remains set to PERIPH_A.
>>>>>> Because of that, this pin is unusable to something else.
>>>>>> This patch sets it back to GPIO.
>>>>>
>>>>> The policy is to leave pins in an unknown state till some peripheral
>>>>> need them.
>>>>>
>>>>> What are you trying to use this pin for ?
>>>> For chip select, but #3. And when SPI communicate with cs0 (PA22), it goes down too (PA14), so 2 devices on bus were
>>>> selected.
>>>
>>> Are you using a 9x5ek board or a custom one, in the latter case could
>>> you paste your spi0 node definition ?
>> I'm using custom board. My spi node:
>> 			spi0: spi@f0000000 {
>> 				status = "okay";
>> 				cs-gpios = <&pioA 23 0
>> 					    &pioA 22 0
>> 					    &pioC 29 0
>> 					    &pioA 14 0>;
>>
>> 				fm25@0 {
>> 					compatible = "cypress,fm25";
>> 					spi-max-frequency = <40000000>;
>> 					reg = <0>;
>> 					pagesize = <256>;
>> 					size = <131072>;
>> 					address-width = <24>;
>> 				};
>> 				/* ADC */
>> 				spidev@1 {
>> 					compatible = "spidev";
>> 					reg = <1>;
>> 					spi-max-frequency = <1000000>;
>> 				};
>> 				/* IO expander for busaddr */
>> 				spidev@2 {
>> 					compatible = "spidev";
>> 					reg = <2>;
>> 					label = "busaddr";
>> 					spi-max-frequency = <10000000>;
>> 				};
>> 				/* audio codec */
>> 				codec: codec@3 {
>> 					compatible = "ti,tlv320aic3x";
>> 					spi-max-frequency = <1000000>;
>> 					reg = <3>;
>> 				};
>> 			};
>>
>> This does not work without patch, because of 2 chips selected at one time because of PA14 is periph_a. Probably ROMBOOT
>> changes that.
>
> Yes, boot code stored in ROM probably mux PA14 to periph A function,
> but with your definition PA 14 should be set GPIO mode when the codec
> device is created.
>
> I don't see any obvious error in your definition, could you add a trace
> there [1] to see if the gpio is successfully requested ?
> Could you also paste the content of /sys/kernel/debug/gpio ?
>
>>>
>>>>> If you just want to use it as a chip select for an spi device, take a
>>>>> look at [1].
>>>> At [1] it's OK until as cs0 is for example PA22 and cs1 is PA14.
>>>
>>> If you want PA14 to control cs1 and PA22 to control cs0 (both
>>> configured as GPIOs), you'll have the following definition:
>>>
>>> cs-gpios = <&pioA 22 0>, <&pioA 14 0>, <0>, <0>;
>> See my node.
>>>
>>>>>
>>>>> Here the gpio is requested by the spi core when defining the cs-gpios
>>>>> property. The gpio controller then request the listed pins to the pin
>>>>> controller (pinctrl driver).
>>>> GPIO is not set in driver as GPIO, at least I didn't find it.
>>>
>>> Take a look at [1], which is set as the gpio_request_enable callback,
>>> called by pinctrl core when a gpio is requested.
>> But is this called from spi driver when requesting gpios as cs?
>
> Yes, it's part of the gpio_request process:
> gpio_request calls request method on at91 gpio_chip which in turn
> calls pinctrl_request_gpio which then calls the gpio_request_enable
> method I previously mentioned.
>
>
> Best Regards,
>
> Boris
>
> [1]http://lxr.free-electrons.com/source/drivers/spi/spi-atmel.c#L1031
>
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Boris Brezillon July 25, 2014, 8:36 a.m. UTC | #9 
Hi Alexandre,

On Fri, 25 Jul 2014 10:30:54 +0200
Alexandre Belloni <alexandre.belloni@free-electrons.com> wrote:

> Hi,
> 
> On 25/07/2014 at 08:14:40 +0200, Jiří Prchal wrote :
> > I'm using custom board. My spi node:
> > 			spi0: spi@f0000000 {
> 
> You should override the pinctrl here as you are using gpios for the cs.
> 				pinctrl-0 = <&pinctrl_spi0_custom>;

I guess you meant:
			pinctrl-0 <&pinctrl_spi0 &pinctrl_spi0_custom>;

I suggested the same thing, however I'm pretty sure this is not the
source of the problem. As I said, gpio_request already mux the
associated pin to GPIO function.

Best Regards,

Boris
Jiri Prchal July 25, 2014, 8:37 a.m. UTC | #10 
Dne 25.7.2014 v 10:30 Alexandre Belloni napsal(a):
> Hi,
>
> On 25/07/2014 at 08:14:40 +0200, Jiří Prchal wrote :
>> I'm using custom board. My spi node:
>> 			spi0: spi@f0000000 {
>
> You should override the pinctrl here as you are using gpios for the cs.
> 				pinctrl-0 = <&pinctrl_spi0_custom>;
>
>> 				status = "okay";
>> 				cs-gpios = <&pioA 23 0
>> 					    &pioA 22 0
>> 					    &pioC 29 0
>> 					    &pioA 14 0>;
>>
>
> 		pinctrl@fffff400 {
> 				spi0 {
> 					 pinctrl_spi0_custom: spi0-custom {
> 							 atmel,pins =
> 									 <AT91_PIOA 23 AT91_PERIPH_GPIO AT91_PINCTRL_NONE>,
> 									 <AT91_PIOA 22 AT91_PERIPH_GPIO AT91_PINCTRL_NONE>,
> 									 <AT91_PIOC 29 AT91_PERIPH_GPIO AT91_PINCTRL_NONE>,
> 									 <AT91_PIOA 14 AT91_PERIPH_GPIO AT91_PINCTRL_NONE>;
> 					 };
> 				};
> 		};
>
Of course, it's the way, but in all other drivers, for example LEDS, it's not needed. And in other way, if I will not 
use PA14 at all, the pin will goes down every spi transfer.
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Boris Brezillon July 25, 2014, 8:45 a.m. UTC | #11 
On Fri, 25 Jul 2014 10:27:13 +0200
Jiří Prchal <jiri.prchal@aksignal.cz> wrote:

[...]
> 
> 
> > Could you also paste the content of /sys/kernel/debug/gpio ?
> The /sys/kernel/debug/ is empty.

You have to enable CONFIG_DEBUG_FS in your config and then mount the
debug file system:

#mount -t debugfs dbg /sys/kernel/debug
Alexandre Belloni July 25, 2014, 8:50 a.m. UTC | #12 
On 25/07/2014 at 10:36:45 +0200, Boris Brezillon wrote :
> Hi Alexandre,
> 
> On Fri, 25 Jul 2014 10:30:54 +0200
> Alexandre Belloni <alexandre.belloni@free-electrons.com> wrote:
> 
> > Hi,
> > 
> > On 25/07/2014 at 08:14:40 +0200, Jiří Prchal wrote :
> > > I'm using custom board. My spi node:
> > > 			spi0: spi@f0000000 {
> > 
> > You should override the pinctrl here as you are using gpios for the cs.
> > 				pinctrl-0 = <&pinctrl_spi0_custom>;
> 
> I guess you meant:
> 			pinctrl-0 <&pinctrl_spi0 &pinctrl_spi0_custom>;
> 

Sure, you are right

> I suggested the same thing, however I'm pretty sure this is not the
> source of the problem. As I said, gpio_request already mux the
> associated pin to GPIO function.
> 
> Best Regards,
> 
> Boris
> 
> 
> -- 
> Boris Brezillon, Free Electrons
> Embedded Linux and Kernel engineering
> http://free-electrons.com
Jiri Prchal July 25, 2014, 8:54 a.m. UTC | #13 
Here it is:
cat /sys/kernel/debug/gpio
GPIOs 0-31, platform/fffff400.gpio, fffff400.gpio:
[in20] GPIOfffff400.gpio3: [gpio] set
[spi0.3] GPIOfffff400.gpio14: [gpio] set
[in19] GPIOfffff400.gpio21: [gpio] set
[spi0.1] GPIOfffff400.gpio22: [gpio] set
[spi0.0] GPIOfffff400.gpio23: [gpio] set
[in18] GPIOfffff400.gpio28: [gpio] set
[out20] GPIOfffff400.gpio29: [gpio] clear
[out18] GPIOfffff400.gpio30: [gpio] clear
[out19] GPIOfffff400.gpio31: [gpio] clear

GPIOs 32-50, platform/fffff600.gpio, fffff600.gpio:
[blue] GPIOfffff600.gpio12: [gpio] set
[gsm_on] GPIOfffff600.gpio13: [gpio] clear
[yellow] GPIOfffff600.gpio14: [gpio] clear
[gsm_rst] GPIOfffff600.gpio15: [gpio] clear
[green] GPIOfffff600.gpio16: [gpio] clear
[red] GPIOfffff600.gpio18: [gpio] clear

GPIOs 64-95, platform/fffff800.gpio, fffff800.gpio:
[in17] GPIOfffff800.gpio16: [gpio] set
[in13] GPIOfffff800.gpio18: [gpio] set
[in14] GPIOfffff800.gpio20: [gpio] set
[por] GPIOfffff800.gpio25: [gpio] clear
[out16] GPIOfffff800.gpio26: [gpio] clear
[out15] GPIOfffff800.gpio28: [gpio] clear
[spi0.2] GPIOfffff800.gpio29: [gpio] set
[out17] GPIOfffff800.gpio30: [gpio] clear

GPIOs 96-117, platform/fffffa00.gpio, fffffa00.gpio:
[nand_enable] GPIOfffffa00.gpio4: [gpio] set
[nand_rdy] GPIOfffffa00.gpio5: [gpio] set
[atmel_usba_udc] GPIOfffffa00.gpio21: [gpio] clear


Dne 25.7.2014 v 10:45 Boris BREZILLON napsal(a):
> On Fri, 25 Jul 2014 10:27:13 +0200
> Jiří Prchal <jiri.prchal@aksignal.cz> wrote:
>
> [...]
>>
>>
>>> Could you also paste the content of /sys/kernel/debug/gpio ?
>> The /sys/kernel/debug/ is empty.
>
> You have to enable CONFIG_DEBUG_FS in your config and then mount the
> debug file system:
>
> #mount -t debugfs dbg /sys/kernel/debug
>
>
>
>
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Alexandre Belloni July 25, 2014, 8:54 a.m. UTC | #14 
On 25/07/2014 at 10:37:31 +0200, Jiří Prchal wrote :
> 
> 
> Dne 25.7.2014 v 10:30 Alexandre Belloni napsal(a):
> >Hi,
> >
> >On 25/07/2014 at 08:14:40 +0200, Jiří Prchal wrote :
> >>I'm using custom board. My spi node:
> >>			spi0: spi@f0000000 {
> >
> >You should override the pinctrl here as you are using gpios for the cs.
> >				pinctrl-0 = <&pinctrl_spi0_custom>;
> >
> >>				status = "okay";
> >>				cs-gpios = <&pioA 23 0
> >>					    &pioA 22 0
> >>					    &pioC 29 0
> >>					    &pioA 14 0>;
> >>
> >
> >		pinctrl@fffff400 {
> >				spi0 {
> >					 pinctrl_spi0_custom: spi0-custom {
> >							 atmel,pins =
> >									 <AT91_PIOA 23 AT91_PERIPH_GPIO AT91_PINCTRL_NONE>,
> >									 <AT91_PIOA 22 AT91_PERIPH_GPIO AT91_PINCTRL_NONE>,
> >									 <AT91_PIOC 29 AT91_PERIPH_GPIO AT91_PINCTRL_NONE>,
> >									 <AT91_PIOA 14 AT91_PERIPH_GPIO AT91_PINCTRL_NONE>;
> >					 };
> >				};
> >		};
> >
> Of course, it's the way, but in all other drivers, for example LEDS,
> it's not needed. And in other way, if I will not use PA14 at all,
> the pin will goes down every spi transfer.

You must not assumed that the pins are muxed to their default state
which is gpio and you should set the pinctrl accordingly for each
device.

If you don't use PA14 at all, then you don't really care about its
state...
Jiri Prchal July 25, 2014, 8:59 a.m. UTC | #15 
Dne 25.7.2014 v 10:54 Alexandre Belloni napsal(a):
> On 25/07/2014 at 10:37:31 +0200, Jiří Prchal wrote :
>>
>>
>> Dne 25.7.2014 v 10:30 Alexandre Belloni napsal(a):
>>> Hi,
>>>
>>> On 25/07/2014 at 08:14:40 +0200, Jiří Prchal wrote :
>>>> I'm using custom board. My spi node:
>>>> 			spi0: spi@f0000000 {
>>>
>>> You should override the pinctrl here as you are using gpios for the cs.
>>> 				pinctrl-0 = <&pinctrl_spi0_custom>;
>>>
>>>> 				status = "okay";
>>>> 				cs-gpios = <&pioA 23 0
>>>> 					    &pioA 22 0
>>>> 					    &pioC 29 0
>>>> 					    &pioA 14 0>;
>>>>
>>>
>>> 		pinctrl@fffff400 {
>>> 				spi0 {
>>> 					 pinctrl_spi0_custom: spi0-custom {
>>> 							 atmel,pins =
>>> 									 <AT91_PIOA 23 AT91_PERIPH_GPIO AT91_PINCTRL_NONE>,
>>> 									 <AT91_PIOA 22 AT91_PERIPH_GPIO AT91_PINCTRL_NONE>,
>>> 									 <AT91_PIOC 29 AT91_PERIPH_GPIO AT91_PINCTRL_NONE>,
>>> 									 <AT91_PIOA 14 AT91_PERIPH_GPIO AT91_PINCTRL_NONE>;
>>> 					 };
>>> 				};
>>> 		};
>>>
>> Of course, it's the way, but in all other drivers, for example LEDS,
>> it's not needed. And in other way, if I will not use PA14 at all,
>> the pin will goes down every spi transfer.
>
> You must not assumed that the pins are muxed to their default state
> which is gpio and you should set the pinctrl accordingly for each
> device.
>
> If you don't use PA14 at all, then you don't really care about its
> state...
Yes and no, what about on board is populated some chip on PA14, but for some reason at this time I don't need it and not 
defined in DT?
>
>
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Boris Brezillon July 25, 2014, 9:01 a.m. UTC | #16 
On Fri, 25 Jul 2014 10:54:23 +0200
Jiří Prchal <jiri.prchal@aksignal.cz> wrote:

> Here it is:
> cat /sys/kernel/debug/gpio
> GPIOs 0-31, platform/fffff400.gpio, fffff400.gpio:
> [in20] GPIOfffff400.gpio3: [gpio] set
> [spi0.3] GPIOfffff400.gpio14: [gpio] set
> [in19] GPIOfffff400.gpio21: [gpio] set
> [spi0.1] GPIOfffff400.gpio22: [gpio] set
> [spi0.0] GPIOfffff400.gpio23: [gpio] set
> [in18] GPIOfffff400.gpio28: [gpio] set
> [out20] GPIOfffff400.gpio29: [gpio] clear
> [out18] GPIOfffff400.gpio30: [gpio] clear
> [out19] GPIOfffff400.gpio31: [gpio] clear
> 
> GPIOs 32-50, platform/fffff600.gpio, fffff600.gpio:
> [blue] GPIOfffff600.gpio12: [gpio] set
> [gsm_on] GPIOfffff600.gpio13: [gpio] clear
> [yellow] GPIOfffff600.gpio14: [gpio] clear
> [gsm_rst] GPIOfffff600.gpio15: [gpio] clear
> [green] GPIOfffff600.gpio16: [gpio] clear
> [red] GPIOfffff600.gpio18: [gpio] clear
> 
> GPIOs 64-95, platform/fffff800.gpio, fffff800.gpio:
> [in17] GPIOfffff800.gpio16: [gpio] set
> [in13] GPIOfffff800.gpio18: [gpio] set
> [in14] GPIOfffff800.gpio20: [gpio] set
> [por] GPIOfffff800.gpio25: [gpio] clear
> [out16] GPIOfffff800.gpio26: [gpio] clear
> [out15] GPIOfffff800.gpio28: [gpio] clear
> [spi0.2] GPIOfffff800.gpio29: [gpio] set
> [out17] GPIOfffff800.gpio30: [gpio] clear
> 
> GPIOs 96-117, platform/fffffa00.gpio, fffffa00.gpio:
> [nand_enable] GPIOfffffa00.gpio4: [gpio] set
> [nand_rdy] GPIOfffffa00.gpio5: [gpio] set
> [atmel_usba_udc] GPIOfffffa00.gpio21: [gpio] clear
> 

Every thing seems in place.
Could you enable CONFIG_DEBUG_PINCTRL and grep on "enable pin" ?

> 
> Dne 25.7.2014 v 10:45 Boris BREZILLON napsal(a):
> > On Fri, 25 Jul 2014 10:27:13 +0200
> > Jiří Prchal <jiri.prchal@aksignal.cz> wrote:
> >
> > [...]
> >>
> >>
> >>> Could you also paste the content of /sys/kernel/debug/gpio ?
> >> The /sys/kernel/debug/ is empty.
> >
> > You have to enable CONFIG_DEBUG_FS in your config and then mount the
> > debug file system:
> >
> > #mount -t debugfs dbg /sys/kernel/debug
> >
> >
> >
> >
Alexandre Belloni July 25, 2014, 9:02 a.m. UTC | #17 
On 25/07/2014 at 10:59:03 +0200, Jiří Prchal wrote :
> >>Of course, it's the way, but in all other drivers, for example LEDS,
> >>it's not needed. And in other way, if I will not use PA14 at all,
> >>the pin will goes down every spi transfer.
> >
> >You must not assumed that the pins are muxed to their default state
> >which is gpio and you should set the pinctrl accordingly for each
> >device.
> >
> >If you don't use PA14 at all, then you don't really care about its
> >state...
> Yes and no, what about on board is populated some chip on PA14, but
> for some reason at this time I don't need it and not defined in DT?
> >

If this is really an issue for that chip, I would think that you will
change the bootloader to not mux PA14 to periph A and stop it from
trying to read it like an spi flash ?
Boris Brezillon July 25, 2014, 9:10 a.m. UTC | #18 
On Fri, 25 Jul 2014 10:59:03 +0200
Jiří Prchal <jiri.prchal@aksignal.cz> wrote:

> 
> 
> Dne 25.7.2014 v 10:54 Alexandre Belloni napsal(a):
> > On 25/07/2014 at 10:37:31 +0200, Jiří Prchal wrote :
> >>
> >>
> >> Dne 25.7.2014 v 10:30 Alexandre Belloni napsal(a):
> >>> Hi,
> >>>
> >>> On 25/07/2014 at 08:14:40 +0200, Jiří Prchal wrote :
> >>>> I'm using custom board. My spi node:
> >>>> 			spi0: spi@f0000000 {
> >>>
> >>> You should override the pinctrl here as you are using gpios for the cs.
> >>> 				pinctrl-0 = <&pinctrl_spi0_custom>;
> >>>
> >>>> 				status = "okay";
> >>>> 				cs-gpios = <&pioA 23 0
> >>>> 					    &pioA 22 0
> >>>> 					    &pioC 29 0
> >>>> 					    &pioA 14 0>;
> >>>>
> >>>
> >>> 		pinctrl@fffff400 {
> >>> 				spi0 {
> >>> 					 pinctrl_spi0_custom: spi0-custom {
> >>> 							 atmel,pins =
> >>> 									 <AT91_PIOA 23 AT91_PERIPH_GPIO AT91_PINCTRL_NONE>,
> >>> 									 <AT91_PIOA 22 AT91_PERIPH_GPIO AT91_PINCTRL_NONE>,
> >>> 									 <AT91_PIOC 29 AT91_PERIPH_GPIO AT91_PINCTRL_NONE>,
> >>> 									 <AT91_PIOA 14 AT91_PERIPH_GPIO AT91_PINCTRL_NONE>;
> >>> 					 };
> >>> 				};
> >>> 		};
> >>>
> >> Of course, it's the way, but in all other drivers, for example LEDS,
> >> it's not needed. And in other way, if I will not use PA14 at all,
> >> the pin will goes down every spi transfer.
> >
> > You must not assumed that the pins are muxed to their default state
> > which is gpio and you should set the pinctrl accordingly for each
> > device.
> >
> > If you don't use PA14 at all, then you don't really care about its
> > state...
> Yes and no, what about on board is populated some chip on PA14, but for some reason at this time I don't need it and not 
> defined in DT?

As long as it's populated you should define it in the DT (the DT should
represent your hardware) and if you don't want to use the populated
device, just set the status property to "disabled" (I'm not sure it
works for spi subdevices though).
Jiri Prchal July 25, 2014, 9:13 a.m. UTC | #19 
Dne 25.7.2014 v 11:01 Boris BREZILLON napsal(a):
> On Fri, 25 Jul 2014 10:54:23 +0200
> Jiří Prchal <jiri.prchal@aksignal.cz> wrote:
>
>> Here it is:
>> cat /sys/kernel/debug/gpio
>> GPIOs 0-31, platform/fffff400.gpio, fffff400.gpio:
>> [in20] GPIOfffff400.gpio3: [gpio] set
>> [spi0.3] GPIOfffff400.gpio14: [gpio] set
>> [in19] GPIOfffff400.gpio21: [gpio] set
>> [spi0.1] GPIOfffff400.gpio22: [gpio] set
>> [spi0.0] GPIOfffff400.gpio23: [gpio] set
>> [in18] GPIOfffff400.gpio28: [gpio] set
>> [out20] GPIOfffff400.gpio29: [gpio] clear
>> [out18] GPIOfffff400.gpio30: [gpio] clear
>> [out19] GPIOfffff400.gpio31: [gpio] clear
>>
>> GPIOs 32-50, platform/fffff600.gpio, fffff600.gpio:
>> [blue] GPIOfffff600.gpio12: [gpio] set
>> [gsm_on] GPIOfffff600.gpio13: [gpio] clear
>> [yellow] GPIOfffff600.gpio14: [gpio] clear
>> [gsm_rst] GPIOfffff600.gpio15: [gpio] clear
>> [green] GPIOfffff600.gpio16: [gpio] clear
>> [red] GPIOfffff600.gpio18: [gpio] clear
>>
>> GPIOs 64-95, platform/fffff800.gpio, fffff800.gpio:
>> [in17] GPIOfffff800.gpio16: [gpio] set
>> [in13] GPIOfffff800.gpio18: [gpio] set
>> [in14] GPIOfffff800.gpio20: [gpio] set
>> [por] GPIOfffff800.gpio25: [gpio] clear
>> [out16] GPIOfffff800.gpio26: [gpio] clear
>> [out15] GPIOfffff800.gpio28: [gpio] clear
>> [spi0.2] GPIOfffff800.gpio29: [gpio] set
>> [out17] GPIOfffff800.gpio30: [gpio] clear
>>
>> GPIOs 96-117, platform/fffffa00.gpio, fffffa00.gpio:
>> [nand_enable] GPIOfffffa00.gpio4: [gpio] set
>> [nand_rdy] GPIOfffffa00.gpio5: [gpio] set
>> [atmel_usba_udc] GPIOfffffa00.gpio21: [gpio] clear
>>
>
> Every thing seems in place.
> Could you enable CONFIG_DEBUG_PINCTRL and grep on "enable pin" ?
/ # dmesg | grep "enable pin"
[    0.968750] pinctrl-at91 ahb:apb:pinctrl@fffff400: enable pin 101 as GPIO
[    0.968750] pinctrl-at91 ahb:apb:pinctrl@fffff400: enable pin 101 as PIOD5 0x20
[    0.968750] pinctrl-at91 ahb:apb:pinctrl@fffff400: enable pin 100 as GPIO
[    0.968750] pinctrl-at91 ahb:apb:pinctrl@fffff400: enable pin 100 as PIOD4 0x10
[    1.238281] pinctrl-at91 ahb:apb:pinctrl@fffff400: enable pin 23 as GPIO
[    1.238281] pinctrl-at91 ahb:apb:pinctrl@fffff400: enable pin 23 as PIOA23 0x800000
[    1.238281] pinctrl-at91 ahb:apb:pinctrl@fffff400: enable pin 22 as GPIO
[    1.238281] pinctrl-at91 ahb:apb:pinctrl@fffff400: enable pin 22 as PIOA22 0x400000
[    1.242187] pinctrl-at91 ahb:apb:pinctrl@fffff400: enable pin 93 as GPIO
[    1.242187] pinctrl-at91 ahb:apb:pinctrl@fffff400: enable pin 93 as PIOC29 0x20000000
[    1.246093] pinctrl-at91 ahb:apb:pinctrl@fffff400: enable pin 14 as GPIO
[    1.246093] pinctrl-at91 ahb:apb:pinctrl@fffff400: enable pin 14 as PIOA14 0x4000
[    1.652343] pinctrl-at91 ahb:apb:pinctrl@fffff400: enable pin 117 as GPIO
[    1.652343] pinctrl-at91 ahb:apb:pinctrl@fffff400: enable pin 117 as PIOD21 0x200000
[    1.742187] pinctrl-at91 ahb:apb:pinctrl@fffff400: enable pin 50 as GPIO
[    1.742187] pinctrl-at91 ahb:apb:pinctrl@fffff400: enable pin 50 as PIOB18 0x40000
[    1.742187] pinctrl-at91 ahb:apb:pinctrl@fffff400: enable pin 48 as GPIO
[    1.742187] pinctrl-at91 ahb:apb:pinctrl@fffff400: enable pin 48 as PIOB16 0x10000
[    1.746093] pinctrl-at91 ahb:apb:pinctrl@fffff400: enable pin 46 as GPIO
[    1.746093] pinctrl-at91 ahb:apb:pinctrl@fffff400: enable pin 46 as PIOB14 0x4000
[    1.746093] pinctrl-at91 ahb:apb:pinctrl@fffff400: enable pin 44 as GPIO
[    1.746093] pinctrl-at91 ahb:apb:pinctrl@fffff400: enable pin 44 as PIOB12 0x1000

>
>>
>> Dne 25.7.2014 v 10:45 Boris BREZILLON napsal(a):
>>> On Fri, 25 Jul 2014 10:27:13 +0200
>>> Jiří Prchal <jiri.prchal@aksignal.cz> wrote:
>>>
>>> [...]
>>>>
>>>>
>>>>> Could you also paste the content of /sys/kernel/debug/gpio ?
>>>> The /sys/kernel/debug/ is empty.
>>>
>>> You have to enable CONFIG_DEBUG_FS in your config and then mount the
>>> debug file system:
>>>
>>> #mount -t debugfs dbg /sys/kernel/debug
>>>
>>>
>>>
>>>
>
>
>
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Boris Brezillon July 25, 2014, 9:31 a.m. UTC | #20 
On Fri, 25 Jul 2014 11:13:51 +0200
Jiří Prchal <jiri.prchal@aksignal.cz> wrote:


> >
> > Every thing seems in place.
> > Could you enable CONFIG_DEBUG_PINCTRL and grep on "enable pin" ?
> / # dmesg | grep "enable pin"
> [    0.968750] pinctrl-at91 ahb:apb:pinctrl@fffff400: enable pin 101 as GPIO
> [    0.968750] pinctrl-at91 ahb:apb:pinctrl@fffff400: enable pin 101 as PIOD5 0x20
> [    0.968750] pinctrl-at91 ahb:apb:pinctrl@fffff400: enable pin 100 as GPIO
> [    0.968750] pinctrl-at91 ahb:apb:pinctrl@fffff400: enable pin 100 as PIOD4 0x10
> [    1.238281] pinctrl-at91 ahb:apb:pinctrl@fffff400: enable pin 23 as GPIO
> [    1.238281] pinctrl-at91 ahb:apb:pinctrl@fffff400: enable pin 23 as PIOA23 0x800000
> [    1.238281] pinctrl-at91 ahb:apb:pinctrl@fffff400: enable pin 22 as GPIO
> [    1.238281] pinctrl-at91 ahb:apb:pinctrl@fffff400: enable pin 22 as PIOA22 0x400000
> [    1.242187] pinctrl-at91 ahb:apb:pinctrl@fffff400: enable pin 93 as GPIO
> [    1.242187] pinctrl-at91 ahb:apb:pinctrl@fffff400: enable pin 93 as PIOC29 0x20000000
> [    1.246093] pinctrl-at91 ahb:apb:pinctrl@fffff400: enable pin 14 as GPIO
> [    1.246093] pinctrl-at91 ahb:apb:pinctrl@fffff400: enable pin 14 as PIOA14 0x4000


Okay, this cleary shows that PA14 pin is muxed as a GPIO (or at least
the driver think it is).


Could you launch these commands (you'll need the devmem tool) and
paste the results ?

#devmem 0xfffff408
#devmem 0xfffff418
#devmem 0xfffff438
#devmem 0xfffff43c
#devmem 0xfffff458
#devmem 0xfffff468
#devmem 0xfffff470
#devmem 0xfffff474
#devmem 0xfffff498
Jiri Prchal July 25, 2014, 9:40 a.m. UTC | #21 
Dne 25.7.2014 v 11:10 Boris BREZILLON napsal(a):
> On Fri, 25 Jul 2014 10:59:03 +0200
> Jiří Prchal <jiri.prchal@aksignal.cz> wrote:
>
>>
>>
>> Dne 25.7.2014 v 10:54 Alexandre Belloni napsal(a):
>>> On 25/07/2014 at 10:37:31 +0200, Jiří Prchal wrote :
>>>>
>>>>
>>>> Dne 25.7.2014 v 10:30 Alexandre Belloni napsal(a):
>>>>> Hi,
>>>>>
>>>>> On 25/07/2014 at 08:14:40 +0200, Jiří Prchal wrote :
>>>>>> I'm using custom board. My spi node:
>>>>>> 			spi0: spi@f0000000 {
>>>>>
>>>>> You should override the pinctrl here as you are using gpios for the cs.
>>>>> 				pinctrl-0 = <&pinctrl_spi0_custom>;
>>>>>
>>>>>> 				status = "okay";
>>>>>> 				cs-gpios = <&pioA 23 0
>>>>>> 					    &pioA 22 0
>>>>>> 					    &pioC 29 0
>>>>>> 					    &pioA 14 0>;
>>>>>>
>>>>>
>>>>> 		pinctrl@fffff400 {
>>>>> 				spi0 {
>>>>> 					 pinctrl_spi0_custom: spi0-custom {
>>>>> 							 atmel,pins =
>>>>> 									 <AT91_PIOA 23 AT91_PERIPH_GPIO AT91_PINCTRL_NONE>,
>>>>> 									 <AT91_PIOA 22 AT91_PERIPH_GPIO AT91_PINCTRL_NONE>,
>>>>> 									 <AT91_PIOC 29 AT91_PERIPH_GPIO AT91_PINCTRL_NONE>,
>>>>> 									 <AT91_PIOA 14 AT91_PERIPH_GPIO AT91_PINCTRL_NONE>;
>>>>> 					 };
>>>>> 				};
>>>>> 		};
>>>>>
>>>> Of course, it's the way, but in all other drivers, for example LEDS,
>>>> it's not needed. And in other way, if I will not use PA14 at all,
>>>> the pin will goes down every spi transfer.
>>>
>>> You must not assumed that the pins are muxed to their default state
>>> which is gpio and you should set the pinctrl accordingly for each
>>> device.
>>>
>>> If you don't use PA14 at all, then you don't really care about its
>>> state...
>> Yes and no, what about on board is populated some chip on PA14, but for some reason at this time I don't need it and not
>> defined in DT?
>
> As long as it's populated you should define it in the DT (the DT should
> represent your hardware) and if you don't want to use the populated
> device, just set the status property to "disabled" (I'm not sure it
> works for spi subdevices though).
OK, that's good idea.

But, I again try my patch in at91sam9x5.dtsi, it works.
/ # dmesg | grep fm25
[    1.238281] fm25 spi0.0: 128 KByte fm25 fram
/ # dmesg | grep "enable pin"
[    0.343750] pinctrl-at91 ahb:apb:pinctrl@fffff400: enable pin 45 as GPIO
[    0.343750] pinctrl-at91 ahb:apb:pinctrl@fffff400: enable pin 45 as PIOB13 0x2000
[    0.343750] pinctrl-at91 ahb:apb:pinctrl@fffff400: enable pin 47 as GPIO
[    0.343750] pinctrl-at91 ahb:apb:pinctrl@fffff400: enable pin 47 as PIOB15 0x8000
[    0.347656] pinctrl-at91 ahb:apb:pinctrl@fffff400: enable pin 82 as GPIO
[    0.347656] pinctrl-at91 ahb:apb:pinctrl@fffff400: enable pin 82 as PIOC18 0x40000
[    0.347656] pinctrl-at91 ahb:apb:pinctrl@fffff400: enable pin 84 as GPIO
[    0.347656] pinctrl-at91 ahb:apb:pinctrl@fffff400: enable pin 84 as PIOC20 0x100000
[    0.351562] pinctrl-at91 ahb:apb:pinctrl@fffff400: enable pin 80 as GPIO
[    0.351562] pinctrl-at91 ahb:apb:pinctrl@fffff400: enable pin 80 as PIOC16 0x10000
[    0.351562] pinctrl-at91 ahb:apb:pinctrl@fffff400: enable pin 28 as GPIO
[    0.351562] pinctrl-at91 ahb:apb:pinctrl@fffff400: enable pin 28 as PIOA28 0x10000000
[    0.351562] pinctrl-at91 ahb:apb:pinctrl@fffff400: enable pin 21 as GPIO
[    0.351562] pinctrl-at91 ahb:apb:pinctrl@fffff400: enable pin 21 as PIOA21 0x200000
[    0.355468] pinctrl-at91 ahb:apb:pinctrl@fffff400: enable pin 3 as GPIO
[    0.355468] pinctrl-at91 ahb:apb:pinctrl@fffff400: enable pin 3 as PIOA3 0x8
[    0.355468] pinctrl-at91 ahb:apb:pinctrl@fffff400: enable pin 92 as GPIO
[    0.355468] pinctrl-at91 ahb:apb:pinctrl@fffff400: enable pin 92 as PIOC28 0x10000000
[    0.359375] pinctrl-at91 ahb:apb:pinctrl@fffff400: enable pin 90 as GPIO
[    0.359375] pinctrl-at91 ahb:apb:pinctrl@fffff400: enable pin 90 as PIOC26 0x4000000
[    0.359375] pinctrl-at91 ahb:apb:pinctrl@fffff400: enable pin 94 as GPIO
[    0.359375] pinctrl-at91 ahb:apb:pinctrl@fffff400: enable pin 94 as PIOC30 0x40000000
[    0.359375] pinctrl-at91 ahb:apb:pinctrl@fffff400: enable pin 30 as GPIO
[    0.363281] pinctrl-at91 ahb:apb:pinctrl@fffff400: enable pin 30 as PIOA30 0x40000000
[    0.363281] pinctrl-at91 ahb:apb:pinctrl@fffff400: enable pin 31 as GPIO
[    0.363281] pinctrl-at91 ahb:apb:pinctrl@fffff400: enable pin 31 as PIOA31 0x80000000
[    0.367187] pinctrl-at91 ahb:apb:pinctrl@fffff400: enable pin 29 as GPIO
[    0.367187] pinctrl-at91 ahb:apb:pinctrl@fffff400: enable pin 29 as PIOA29 0x20000000
[    0.367187] pinctrl-at91 ahb:apb:pinctrl@fffff400: enable pin 89 as GPIO
[    0.367187] pinctrl-at91 ahb:apb:pinctrl@fffff400: enable pin 89 as PIOC25 0x2000000
[    0.968750] pinctrl-at91 ahb:apb:pinctrl@fffff400: enable pin 101 as GPIO
[    0.968750] pinctrl-at91 ahb:apb:pinctrl@fffff400: enable pin 101 as PIOD5 0x20
[    0.968750] pinctrl-at91 ahb:apb:pinctrl@fffff400: enable pin 100 as GPIO
[    0.968750] pinctrl-at91 ahb:apb:pinctrl@fffff400: enable pin 100 as PIOD4 0x10
[    1.234375] pinctrl-at91 ahb:apb:pinctrl@fffff400: enable pin 23 as GPIO
[    1.234375] pinctrl-at91 ahb:apb:pinctrl@fffff400: enable pin 23 as PIOA23 0x800000
[    1.242187] pinctrl-at91 ahb:apb:pinctrl@fffff400: enable pin 22 as GPIO
[    1.242187] pinctrl-at91 ahb:apb:pinctrl@fffff400: enable pin 22 as PIOA22 0x400000
[    1.246093] pinctrl-at91 ahb:apb:pinctrl@fffff400: enable pin 93 as GPIO
[    1.246093] pinctrl-at91 ahb:apb:pinctrl@fffff400: enable pin 93 as PIOC29 0x20000000
[    1.250000] pinctrl-at91 ahb:apb:pinctrl@fffff400: enable pin 14 as GPIO
[    1.250000] pinctrl-at91 ahb:apb:pinctrl@fffff400: enable pin 14 as PIOA14 0x4000
[    1.656250] pinctrl-at91 ahb:apb:pinctrl@fffff400: enable pin 117 as GPIO
[    1.656250] pinctrl-at91 ahb:apb:pinctrl@fffff400: enable pin 117 as PIOD21 0x200000
[    1.746093] pinctrl-at91 ahb:apb:pinctrl@fffff400: enable pin 50 as GPIO
[    1.746093] pinctrl-at91 ahb:apb:pinctrl@fffff400: enable pin 50 as PIOB18 0x40000
[    1.746093] pinctrl-at91 ahb:apb:pinctrl@fffff400: enable pin 48 as GPIO
[    1.746093] pinctrl-at91 ahb:apb:pinctrl@fffff400: enable pin 48 as PIOB16 0x10000
[    1.750000] pinctrl-at91 ahb:apb:pinctrl@fffff400: enable pin 46 as GPIO
[    1.750000] pinctrl-at91 ahb:apb:pinctrl@fffff400: enable pin 46 as PIOB14 0x4000
[    1.750000] pinctrl-at91 ahb:apb:pinctrl@fffff400: enable pin 44 as GPIO
[    1.750000] pinctrl-at91 ahb:apb:pinctrl@fffff400: enable pin 44 as PIOB12 0x1000

When I try it in my boerd dts, it works too.
				spi0 {
					pinctrl_spi0_cs: spi0-cs {
						atmel,pins =
						<AT91_PIOA 23 AT91_PERIPH_GPIO AT91_PINCTRL_NONE>,
						<AT91_PIOA 22 AT91_PERIPH_GPIO AT91_PINCTRL_NONE>,
						<AT91_PIOC 29 AT91_PERIPH_GPIO AT91_PINCTRL_NONE>,
						<AT91_PIOA 14 AT91_PERIPH_GPIO AT91_PINCTRL_NONE>;
					};
				};

			spi0: spi@f0000000 {
				status = "okay";
				pinctrl-0 = <&pinctrl_spi0 &pinctrl_spi0_cs>;
				cs-gpios = <&pioA 23 0
					    &pioA 22 0
					    &pioC 29 0
					    &pioA 14 0>;

/ # dmesg | grep fm25
[    1.234375] fm25 spi0.0: 128 KByte fm25 fram
/ # dmesg | grep "enable pin"
[    0.332031] pinctrl-at91 ahb:apb:pinctrl@fffff400: enable pin 45 as GPIO
[    0.332031] pinctrl-at91 ahb:apb:pinctrl@fffff400: enable pin 45 as PIOB13 0x2000
[    0.332031] pinctrl-at91 ahb:apb:pinctrl@fffff400: enable pin 47 as GPIO
[    0.332031] pinctrl-at91 ahb:apb:pinctrl@fffff400: enable pin 47 as PIOB15 0x8000
[    0.332031] pinctrl-at91 ahb:apb:pinctrl@fffff400: enable pin 82 as GPIO
[    0.332031] pinctrl-at91 ahb:apb:pinctrl@fffff400: enable pin 82 as PIOC18 0x40000
[    0.335937] pinctrl-at91 ahb:apb:pinctrl@fffff400: enable pin 84 as GPIO
[    0.335937] pinctrl-at91 ahb:apb:pinctrl@fffff400: enable pin 84 as PIOC20 0x100000
[    0.335937] pinctrl-at91 ahb:apb:pinctrl@fffff400: enable pin 80 as GPIO
[    0.335937] pinctrl-at91 ahb:apb:pinctrl@fffff400: enable pin 80 as PIOC16 0x10000
[    0.339843] pinctrl-at91 ahb:apb:pinctrl@fffff400: enable pin 28 as GPIO
[    0.339843] pinctrl-at91 ahb:apb:pinctrl@fffff400: enable pin 28 as PIOA28 0x10000000
[    0.339843] pinctrl-at91 ahb:apb:pinctrl@fffff400: enable pin 21 as GPIO
[    0.339843] pinctrl-at91 ahb:apb:pinctrl@fffff400: enable pin 21 as PIOA21 0x200000
[    0.339843] pinctrl-at91 ahb:apb:pinctrl@fffff400: enable pin 3 as GPIO
[    0.339843] pinctrl-at91 ahb:apb:pinctrl@fffff400: enable pin 3 as PIOA3 0x8
[    0.343750] pinctrl-at91 ahb:apb:pinctrl@fffff400: enable pin 92 as GPIO
[    0.343750] pinctrl-at91 ahb:apb:pinctrl@fffff400: enable pin 92 as PIOC28 0x10000000
[    0.343750] pinctrl-at91 ahb:apb:pinctrl@fffff400: enable pin 90 as GPIO
[    0.343750] pinctrl-at91 ahb:apb:pinctrl@fffff400: enable pin 90 as PIOC26 0x4000000
[    0.347656] pinctrl-at91 ahb:apb:pinctrl@fffff400: enable pin 94 as GPIO
[    0.347656] pinctrl-at91 ahb:apb:pinctrl@fffff400: enable pin 94 as PIOC30 0x40000000
[    0.347656] pinctrl-at91 ahb:apb:pinctrl@fffff400: enable pin 30 as GPIO
[    0.347656] pinctrl-at91 ahb:apb:pinctrl@fffff400: enable pin 30 as PIOA30 0x40000000
[    0.351562] pinctrl-at91 ahb:apb:pinctrl@fffff400: enable pin 31 as GPIO
[    0.351562] pinctrl-at91 ahb:apb:pinctrl@fffff400: enable pin 31 as PIOA31 0x80000000
[    0.351562] pinctrl-at91 ahb:apb:pinctrl@fffff400: enable pin 29 as GPIO
[    0.351562] pinctrl-at91 ahb:apb:pinctrl@fffff400: enable pin 29 as PIOA29 0x20000000
[    0.351562] pinctrl-at91 ahb:apb:pinctrl@fffff400: enable pin 89 as GPIO
[    0.351562] pinctrl-at91 ahb:apb:pinctrl@fffff400: enable pin 89 as PIOC25 0x2000000
[    0.964843] pinctrl-at91 ahb:apb:pinctrl@fffff400: enable pin 101 as GPIO
[    0.964843] pinctrl-at91 ahb:apb:pinctrl@fffff400: enable pin 101 as PIOD5 0x20
[    0.964843] pinctrl-at91 ahb:apb:pinctrl@fffff400: enable pin 100 as GPIO
[    0.964843] pinctrl-at91 ahb:apb:pinctrl@fffff400: enable pin 100 as PIOD4 0x10
[    1.230468] pinctrl-at91 ahb:apb:pinctrl@fffff400: enable pin 23 as GPIO
[    1.230468] pinctrl-at91 ahb:apb:pinctrl@fffff400: enable pin 23 as PIOA23 0x800000
[    1.238281] pinctrl-at91 ahb:apb:pinctrl@fffff400: enable pin 22 as GPIO
[    1.238281] pinctrl-at91 ahb:apb:pinctrl@fffff400: enable pin 22 as PIOA22 0x400000
[    1.242187] pinctrl-at91 ahb:apb:pinctrl@fffff400: enable pin 93 as GPIO
[    1.242187] pinctrl-at91 ahb:apb:pinctrl@fffff400: enable pin 93 as PIOC29 0x20000000
[    1.246093] pinctrl-at91 ahb:apb:pinctrl@fffff400: enable pin 14 as GPIO
[    1.246093] pinctrl-at91 ahb:apb:pinctrl@fffff400: enable pin 14 as PIOA14 0x4000
[    1.652343] pinctrl-at91 ahb:apb:pinctrl@fffff400: enable pin 117 as GPIO
[    1.652343] pinctrl-at91 ahb:apb:pinctrl@fffff400: enable pin 117 as PIOD21 0x200000
[    1.742187] pinctrl-at91 ahb:apb:pinctrl@fffff400: enable pin 50 as GPIO
[    1.742187] pinctrl-at91 ahb:apb:pinctrl@fffff400: enable pin 50 as PIOB18 0x40000
[    1.742187] pinctrl-at91 ahb:apb:pinctrl@fffff400: enable pin 48 as GPIO
[    1.742187] pinctrl-at91 ahb:apb:pinctrl@fffff400: enable pin 48 as PIOB16 0x10000
[    1.746093] pinctrl-at91 ahb:apb:pinctrl@fffff400: enable pin 46 as GPIO
[    1.746093] pinctrl-at91 ahb:apb:pinctrl@fffff400: enable pin 46 as PIOB14 0x4000
[    1.746093] pinctrl-at91 ahb:apb:pinctrl@fffff400: enable pin 44 as GPIO
[    1.746093] pinctrl-at91 ahb:apb:pinctrl@fffff400: enable pin 44 as PIOB12 0x1000

When not, it doesn't work.
			spi0: spi@f0000000 {
				status = "okay";
				/*pinctrl-0 = <&pinctrl_spi0 &pinctrl_spi0_cs>;*/
				cs-gpios = <&pioA 23 0
					    &pioA 22 0
					    &pioC 29 0
					    &pioA 14 0>;

/ # dmesg | grep fm25
/ # dmesg | grep "enable pin"
[    0.328125] pinctrl-at91 ahb:apb:pinctrl@fffff400: enable pin 45 as GPIO
[    0.328125] pinctrl-at91 ahb:apb:pinctrl@fffff400: enable pin 45 as PIOB13 0x2000
[    0.328125] pinctrl-at91 ahb:apb:pinctrl@fffff400: enable pin 47 as GPIO
[    0.328125] pinctrl-at91 ahb:apb:pinctrl@fffff400: enable pin 47 as PIOB15 0x8000
[    0.328125] pinctrl-at91 ahb:apb:pinctrl@fffff400: enable pin 82 as GPIO
[    0.328125] pinctrl-at91 ahb:apb:pinctrl@fffff400: enable pin 82 as PIOC18 0x40000
[    0.332031] pinctrl-at91 ahb:apb:pinctrl@fffff400: enable pin 84 as GPIO
[    0.332031] pinctrl-at91 ahb:apb:pinctrl@fffff400: enable pin 84 as PIOC20 0x100000
[    0.332031] pinctrl-at91 ahb:apb:pinctrl@fffff400: enable pin 80 as GPIO
[    0.332031] pinctrl-at91 ahb:apb:pinctrl@fffff400: enable pin 80 as PIOC16 0x10000
[    0.335937] pinctrl-at91 ahb:apb:pinctrl@fffff400: enable pin 28 as GPIO
[    0.335937] pinctrl-at91 ahb:apb:pinctrl@fffff400: enable pin 28 as PIOA28 0x10000000
[    0.335937] pinctrl-at91 ahb:apb:pinctrl@fffff400: enable pin 21 as GPIO
[    0.335937] pinctrl-at91 ahb:apb:pinctrl@fffff400: enable pin 21 as PIOA21 0x200000
[    0.339843] pinctrl-at91 ahb:apb:pinctrl@fffff400: enable pin 3 as GPIO
[    0.339843] pinctrl-at91 ahb:apb:pinctrl@fffff400: enable pin 3 as PIOA3 0x8
[    0.339843] pinctrl-at91 ahb:apb:pinctrl@fffff400: enable pin 92 as GPIO
[    0.339843] pinctrl-at91 ahb:apb:pinctrl@fffff400: enable pin 92 as PIOC28 0x10000000
[    0.343750] pinctrl-at91 ahb:apb:pinctrl@fffff400: enable pin 90 as GPIO
[    0.343750] pinctrl-at91 ahb:apb:pinctrl@fffff400: enable pin 90 as PIOC26 0x4000000
[    0.343750] pinctrl-at91 ahb:apb:pinctrl@fffff400: enable pin 94 as GPIO
[    0.343750] pinctrl-at91 ahb:apb:pinctrl@fffff400: enable pin 94 as PIOC30 0x40000000
[    0.347656] pinctrl-at91 ahb:apb:pinctrl@fffff400: enable pin 30 as GPIO
[    0.347656] pinctrl-at91 ahb:apb:pinctrl@fffff400: enable pin 30 as PIOA30 0x40000000
[    0.347656] pinctrl-at91 ahb:apb:pinctrl@fffff400: enable pin 31 as GPIO
[    0.347656] pinctrl-at91 ahb:apb:pinctrl@fffff400: enable pin 31 as PIOA31 0x80000000
[    0.347656] pinctrl-at91 ahb:apb:pinctrl@fffff400: enable pin 29 as GPIO
[    0.347656] pinctrl-at91 ahb:apb:pinctrl@fffff400: enable pin 29 as PIOA29 0x20000000
[    0.351562] pinctrl-at91 ahb:apb:pinctrl@fffff400: enable pin 89 as GPIO
[    0.351562] pinctrl-at91 ahb:apb:pinctrl@fffff400: enable pin 89 as PIOC25 0x2000000
[    0.968750] pinctrl-at91 ahb:apb:pinctrl@fffff400: enable pin 101 as GPIO
[    0.968750] pinctrl-at91 ahb:apb:pinctrl@fffff400: enable pin 101 as PIOD5 0x20
[    0.968750] pinctrl-at91 ahb:apb:pinctrl@fffff400: enable pin 100 as GPIO
[    0.968750] pinctrl-at91 ahb:apb:pinctrl@fffff400: enable pin 100 as PIOD4 0x10
[    1.238281] pinctrl-at91 ahb:apb:pinctrl@fffff400: enable pin 23 as GPIO
[    1.238281] pinctrl-at91 ahb:apb:pinctrl@fffff400: enable pin 23 as PIOA23 0x800000
[    1.238281] pinctrl-at91 ahb:apb:pinctrl@fffff400: enable pin 22 as GPIO
[    1.238281] pinctrl-at91 ahb:apb:pinctrl@fffff400: enable pin 22 as PIOA22 0x400000
[    1.242187] pinctrl-at91 ahb:apb:pinctrl@fffff400: enable pin 93 as GPIO
[    1.242187] pinctrl-at91 ahb:apb:pinctrl@fffff400: enable pin 93 as PIOC29 0x20000000
[    1.246093] pinctrl-at91 ahb:apb:pinctrl@fffff400: enable pin 14 as GPIO
[    1.246093] pinctrl-at91 ahb:apb:pinctrl@fffff400: enable pin 14 as PIOA14 0x4000
[    1.652343] pinctrl-at91 ahb:apb:pinctrl@fffff400: enable pin 117 as GPIO
[    1.652343] pinctrl-at91 ahb:apb:pinctrl@fffff400: enable pin 117 as PIOD21 0x200000
[    1.742187] pinctrl-at91 ahb:apb:pinctrl@fffff400: enable pin 50 as GPIO
[    1.742187] pinctrl-at91 ahb:apb:pinctrl@fffff400: enable pin 50 as PIOB18 0x40000
[    1.742187] pinctrl-at91 ahb:apb:pinctrl@fffff400: enable pin 48 as GPIO
[    1.742187] pinctrl-at91 ahb:apb:pinctrl@fffff400: enable pin 48 as PIOB16 0x10000
[    1.746093] pinctrl-at91 ahb:apb:pinctrl@fffff400: enable pin 46 as GPIO
[    1.746093] pinctrl-at91 ahb:apb:pinctrl@fffff400: enable pin 46 as PIOB14 0x4000
[    1.746093] pinctrl-at91 ahb:apb:pinctrl@fffff400: enable pin 44 as GPIO
[    1.746093] pinctrl-at91 ahb:apb:pinctrl@fffff400: enable pin 44 as PIOB12 0x1000

>
>
>
>
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Jiri Prchal July 25, 2014, 10:06 a.m. UTC | #22 
Dne 25.7.2014 v 11:31 Boris BREZILLON napsal(a):
> On Fri, 25 Jul 2014 11:13:51 +0200
> Jiří Prchal <jiri.prchal@aksignal.cz> wrote:
>
>
>>>
>>> Every thing seems in place.
>>> Could you enable CONFIG_DEBUG_PINCTRL and grep on "enable pin" ?
>> / # dmesg | grep "enable pin"
>> [    0.968750] pinctrl-at91 ahb:apb:pinctrl@fffff400: enable pin 101 as GPIO
>> [    0.968750] pinctrl-at91 ahb:apb:pinctrl@fffff400: enable pin 101 as PIOD5 0x20
>> [    0.968750] pinctrl-at91 ahb:apb:pinctrl@fffff400: enable pin 100 as GPIO
>> [    0.968750] pinctrl-at91 ahb:apb:pinctrl@fffff400: enable pin 100 as PIOD4 0x10
>> [    1.238281] pinctrl-at91 ahb:apb:pinctrl@fffff400: enable pin 23 as GPIO
>> [    1.238281] pinctrl-at91 ahb:apb:pinctrl@fffff400: enable pin 23 as PIOA23 0x800000
>> [    1.238281] pinctrl-at91 ahb:apb:pinctrl@fffff400: enable pin 22 as GPIO
>> [    1.238281] pinctrl-at91 ahb:apb:pinctrl@fffff400: enable pin 22 as PIOA22 0x400000
>> [    1.242187] pinctrl-at91 ahb:apb:pinctrl@fffff400: enable pin 93 as GPIO
>> [    1.242187] pinctrl-at91 ahb:apb:pinctrl@fffff400: enable pin 93 as PIOC29 0x20000000
>> [    1.246093] pinctrl-at91 ahb:apb:pinctrl@fffff400: enable pin 14 as GPIO
>> [    1.246093] pinctrl-at91 ahb:apb:pinctrl@fffff400: enable pin 14 as PIOA14 0x4000
>
>
> Okay, this cleary shows that PA14 pin is muxed as a GPIO (or at least
> the driver think it is).
>
>
> Could you launch these commands (you'll need the devmem tool) and
> paste the results ?
>
> #devmem 0xfffff408
> #devmem 0xfffff418
> #devmem 0xfffff438
> #devmem 0xfffff43c
> #devmem 0xfffff458
> #devmem 0xfffff468
> #devmem 0xfffff470
> #devmem 0xfffff474
> #devmem 0xfffff498
>
/ # devmem 0xfffff408
0xF0E04018
/ # devmem 0xfffff418
0xE0C04000
/ # devmem 0xfffff438
0x00C04000
/ # devmem 0xfffff43c
0x13FFD7FB
/ # devmem 0xfffff458
0x00000000
/ # devmem 0xfffff468
0xFF223B4E
/ # devmem 0xfffff470
0x0F000000
/ # devmem 0xfffff474
0x00000000
/ # devmem 0xfffff498
0xFFFFFFFF

I get thought if is possible that in time of probe fm25 (it's first) is not configured PA14 (it 's last)?
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Boris Brezillon July 25, 2014, 10:18 a.m. UTC | #23 
On Fri, 25 Jul 2014 12:06:30 +0200
Jiří Prchal <jiri.prchal@aksignal.cz> wrote:

> 
> 
> Dne 25.7.2014 v 11:31 Boris BREZILLON napsal(a):
> > On Fri, 25 Jul 2014 11:13:51 +0200
> > Jiří Prchal <jiri.prchal@aksignal.cz> wrote:
> >
> >
> >>>
> >>> Every thing seems in place.
> >>> Could you enable CONFIG_DEBUG_PINCTRL and grep on "enable pin" ?
> >> / # dmesg | grep "enable pin"
> >> [    0.968750] pinctrl-at91 ahb:apb:pinctrl@fffff400: enable pin 101 as GPIO
> >> [    0.968750] pinctrl-at91 ahb:apb:pinctrl@fffff400: enable pin 101 as PIOD5 0x20
> >> [    0.968750] pinctrl-at91 ahb:apb:pinctrl@fffff400: enable pin 100 as GPIO
> >> [    0.968750] pinctrl-at91 ahb:apb:pinctrl@fffff400: enable pin 100 as PIOD4 0x10
> >> [    1.238281] pinctrl-at91 ahb:apb:pinctrl@fffff400: enable pin 23 as GPIO
> >> [    1.238281] pinctrl-at91 ahb:apb:pinctrl@fffff400: enable pin 23 as PIOA23 0x800000
> >> [    1.238281] pinctrl-at91 ahb:apb:pinctrl@fffff400: enable pin 22 as GPIO
> >> [    1.238281] pinctrl-at91 ahb:apb:pinctrl@fffff400: enable pin 22 as PIOA22 0x400000
> >> [    1.242187] pinctrl-at91 ahb:apb:pinctrl@fffff400: enable pin 93 as GPIO
> >> [    1.242187] pinctrl-at91 ahb:apb:pinctrl@fffff400: enable pin 93 as PIOC29 0x20000000
> >> [    1.246093] pinctrl-at91 ahb:apb:pinctrl@fffff400: enable pin 14 as GPIO
> >> [    1.246093] pinctrl-at91 ahb:apb:pinctrl@fffff400: enable pin 14 as PIOA14 0x4000
> >
> >
> > Okay, this cleary shows that PA14 pin is muxed as a GPIO (or at least
> > the driver think it is).
> >
> >
> > Could you launch these commands (you'll need the devmem tool) and
> > paste the results ?
> >
> > #devmem 0xfffff408
> > #devmem 0xfffff418
> > #devmem 0xfffff438
> > #devmem 0xfffff43c
> > #devmem 0xfffff458
> > #devmem 0xfffff468
> > #devmem 0xfffff470
> > #devmem 0xfffff474
> > #devmem 0xfffff498
> >
> / # devmem 0xfffff408
> 0xF0E04018
> / # devmem 0xfffff418
> 0xE0C04000
> / # devmem 0xfffff438
> 0x00C04000
> / # devmem 0xfffff43c
> 0x13FFD7FB
> / # devmem 0xfffff458
> 0x00000000
> / # devmem 0xfffff468
> 0xFF223B4E
> / # devmem 0xfffff470
> 0x0F000000
> / # devmem 0xfffff474
> 0x00000000
> / # devmem 0xfffff498
> 0xFFFFFFFF
> 
> I get thought if is possible that in time of probe fm25 (it's first) is not configured PA14 (it 's last)?

Oh, nice catch!
I think you've found the origin of this bug.
Indeed each device is instantiated sequentially and thus when the first
device is probed (CS0) the last one has not requested it's cs_gpio yet
(and PA14 is still assigned to periph A).

Declaring cs-pins and referencing them in pinctrl-0 solves the issue
because in this case all CS pins are requested during controller probe.
Jiri Prchal July 25, 2014, 10:32 a.m. UTC | #24 
Dne 25.7.2014 v 12:18 Boris BREZILLON napsal(a):
>> / # devmem 0xfffff408
>> 0xF0E04018
>> / # devmem 0xfffff418
>> 0xE0C04000
>> / # devmem 0xfffff438
>> 0x00C04000
>> / # devmem 0xfffff43c
>> 0x13FFD7FB
>> / # devmem 0xfffff458
>> 0x00000000
>> / # devmem 0xfffff468
>> 0xFF223B4E
>> / # devmem 0xfffff470
>> 0x0F000000
>> / # devmem 0xfffff474
>> 0x00000000
>> / # devmem 0xfffff498
>> 0xFFFFFFFF
>>
>> I get thought if is possible that in time of probe fm25 (it's first) is not configured PA14 (it 's last)?
>
> Oh, nice catch!
> I think you've found the origin of this bug.
> Indeed each device is instantiated sequentially and thus when the first
> device is probed (CS0) the last one has not requested it's cs_gpio yet
> (and PA14 is still assigned to periph A).
>
> Declaring cs-pins and referencing them in pinctrl-0 solves the issue
> because in this case all CS pins are requested during controller probe.
>
So, what would be the right fix up? I my patch it's not good idea since some other driver can request pin for other 
peripheral earlier than spi. In board dts it could be new investigating for someone else who don't know this issue. I 
think the best way would be request all cs in early spi init since cs depends on each other and must be all of them in 
right state before any communication on bus. They are part of bus, like miso, mosi, clk, not part of chips. Also they 
are defined in parent spi node, not in child chip node.
Am I right?
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Boris Brezillon July 25, 2014, 11:34 a.m. UTC | #25 
On Fri, 25 Jul 2014 12:32:38 +0200
Jiří Prchal <jiri.prchal@aksignal.cz> wrote:

> 
> 
> Dne 25.7.2014 v 12:18 Boris BREZILLON napsal(a):
> >> / # devmem 0xfffff408
> >> 0xF0E04018
> >> / # devmem 0xfffff418
> >> 0xE0C04000
> >> / # devmem 0xfffff438
> >> 0x00C04000
> >> / # devmem 0xfffff43c
> >> 0x13FFD7FB
> >> / # devmem 0xfffff458
> >> 0x00000000
> >> / # devmem 0xfffff468
> >> 0xFF223B4E
> >> / # devmem 0xfffff470
> >> 0x0F000000
> >> / # devmem 0xfffff474
> >> 0x00000000
> >> / # devmem 0xfffff498
> >> 0xFFFFFFFF
> >>
> >> I get thought if is possible that in time of probe fm25 (it's first) is not configured PA14 (it 's last)?
> >
> > Oh, nice catch!
> > I think you've found the origin of this bug.
> > Indeed each device is instantiated sequentially and thus when the first
> > device is probed (CS0) the last one has not requested it's cs_gpio yet
> > (and PA14 is still assigned to periph A).
> >
> > Declaring cs-pins and referencing them in pinctrl-0 solves the issue
> > because in this case all CS pins are requested during controller probe.
> >
> So, what would be the right fix up? I my patch it's not good idea since some other driver can request pin for other 
> peripheral earlier than spi. In board dts it could be new investigating for someone else who don't know this issue. I 
> think the best way would be request all cs in early spi init since cs depends on each other and must be all of them in 
> right state before any communication on bus. They are part of bus, like miso, mosi, clk, not part of chips. Also they 
> are defined in parent spi node, not in child chip node.
> Am I right?

Yes, you can take a look at [1] as an example.

[1]http://lxr.free-electrons.com/source/drivers/spi/spi-efm32.c#L361
diff mbox

Patch

--- a/linux-3.16-rc6/arch/arm/boot/dts/at91sam9x5.dtsi
+++ b/linux-3.16-rc6/arch/arm/boot/dts/at91sam9x5.dtsi
@@ -624,7 +624,8 @@ 
 						atmel,pins =
 							<AT91_PIOA 11 AT91_PERIPH_A AT91_PINCTRL_NONE	/* PA11 periph A SPI0_MISO pin */
 							 AT91_PIOA 12 AT91_PERIPH_A AT91_PINCTRL_NONE	/* PA12 periph A SPI0_MOSI pin */
-							 AT91_PIOA 13 AT91_PERIPH_A AT91_PINCTRL_NONE>;	/* PA13 periph A SPI0_SPCK pin */
+							 AT91_PIOA 13 AT91_PERIPH_A AT91_PINCTRL_NONE	/* PA13 periph A SPI0_SPCK pin */
+							 AT91_PIOA 14 AT91_PERIPH_GPIO AT91_PINCTRL_NONE>; /* set from ROMBOOT to periph A */
 					};
 				};