| Message ID | 20251101190848.24271-1-dinguyen@kernel.org |
|---|---|
| State | New |
| Headers | show |
| Series | dt-bindings: fpga: update link for Altera's and AMD partial recon | expand |
On Sat, Nov 01, 2025 at 02:08:48PM -0500, Dinh Nguyen wrote: > The link is giving the 404 error, so use the correct link for the > documents > > Signed-off-by: Dinh Nguyen <dinguyen@kernel.org> > --- > Documentation/devicetree/bindings/fpga/fpga-region.yaml | 4 ++-- > 1 file changed, 2 insertions(+), 2 deletions(-) Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Best regards, Krzysztof
diff --git a/Documentation/devicetree/bindings/fpga/fpga-region.yaml b/Documentation/devicetree/bindings/fpga/fpga-region.yaml index 7d2d3b7aa4b7..98e7c311c0c8 100644 --- a/Documentation/devicetree/bindings/fpga/fpga-region.yaml +++ b/Documentation/devicetree/bindings/fpga/fpga-region.yaml @@ -215,9 +215,9 @@ description: | FPGA Bridges that exist on the FPGA fabric prior to the partial reconfiguration. -- - [1] www.altera.com/content/dam/altera-www/global/en_US/pdfs/literature/ug/ug_partrecon.pdf + [1] https://www.intel.com/programmable/technical-pdfs/683404.pdf [2] tspace.library.utoronto.ca/bitstream/1807/67932/1/Byma_Stuart_A_201411_MAS_thesis.pdf - [3] https://www.xilinx.com/support/documentation/sw_manuals/xilinx14_1/ug702.pdf + [3] https://docs.amd.com/v/u/en-US/ug702 properties: $nodename:
The link is giving the 404 error, so use the correct link for the documents Signed-off-by: Dinh Nguyen <dinguyen@kernel.org> --- Documentation/devicetree/bindings/fpga/fpga-region.yaml | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-)