| Message ID | 20250730-phy-qcom-edp-add-missing-refclk-v1-1-6f78afeadbcf@linaro.org |
|---|---|
| State | Changes Requested |
| Headers | show |
| Series | phy: qcom: edp: Add missing refclk clock to x1e80100 | expand |
| Context | Check | Description |
|---|---|---|
| robh/checkpatch | warning | total: 0 errors, 1 warnings, 40 lines checked |
| robh/patch-applied | success | |
| robh/dt-meta-schema | fail | build log |
On Wed, 30 Jul 2025 14:46:48 +0300, Abel Vesa wrote: > On X Elite platform, the eDP PHY uses one more clock called > refclk. Add it to the schema. > > Cc: stable@vger.kernel.org # v6.10 > Fixes: 5d5607861350 ("dt-bindings: phy: qcom-edp: Add X1E80100 PHY compatibles") > Signed-off-by: Abel Vesa <abel.vesa@linaro.org> > --- > .../devicetree/bindings/phy/qcom,edp-phy.yaml | 23 +++++++++++++++++++++- > 1 file changed, 22 insertions(+), 1 deletion(-) > My bot found errors running 'make dt_binding_check' on your patch: yamllint warnings/errors: dtschema/dtc warnings/errors: /builds/robherring/dt-review-ci/linux/Documentation/devicetree/bindings/display/msm/qcom,sa8775p-mdss.example.dtb: phy@aec2a00 (qcom,sa8775p-edp-phy): clock-names: ['aux', 'cfg_ahb'] is too short from schema $id: http://devicetree.org/schemas/phy/qcom,edp-phy.yaml# /builds/robherring/dt-review-ci/linux/Documentation/devicetree/bindings/display/msm/qcom,sc7280-mdss.example.dtb: phy@aec2a00 (qcom,sc7280-edp-phy): clock-names: ['aux', 'cfg_ahb'] is too short from schema $id: http://devicetree.org/schemas/phy/qcom,edp-phy.yaml# /builds/robherring/dt-review-ci/linux/Documentation/devicetree/bindings/phy/qcom,edp-phy.example.dtb: phy@aec2a00 (qcom,sc8180x-edp-phy): clock-names: ['aux', 'cfg_ahb'] is too short from schema $id: http://devicetree.org/schemas/phy/qcom,edp-phy.yaml# doc reference errors (make refcheckdocs): See https://patchwork.ozlabs.org/project/devicetree-bindings/patch/20250730-phy-qcom-edp-add-missing-refclk-v1-1-6f78afeadbcf@linaro.org The base for the series is generally the latest rc1. A different dependency should be noted in *this* patch. If you already ran 'make dt_binding_check' and didn't see the above error(s), then make sure 'yamllint' is installed and dt-schema is up to date: pip3 install dtschema --upgrade Please check and re-submit after running the above command yourself. Note that DT_SCHEMA_FILES can be set to your schema file to speed up checking your schema. However, it must be unset to test all examples with your schema.
On 30/07/2025 13:46, Abel Vesa wrote: > On X Elite platform, the eDP PHY uses one more clock called > refclk. Add it to the schema. And what happens if you do not provide that clock? You need to provide rationale for ABI break. > > Cc: stable@vger.kernel.org # v6.10 > Fixes: 5d5607861350 ("dt-bindings: phy: qcom-edp: Add X1E80100 PHY compatibles") > Signed-off-by: Abel Vesa <abel.vesa@linaro.org> > --- > .../devicetree/bindings/phy/qcom,edp-phy.yaml | 23 +++++++++++++++++++++- > 1 file changed, 22 insertions(+), 1 deletion(-) > > diff --git a/Documentation/devicetree/bindings/phy/qcom,edp-phy.yaml b/Documentation/devicetree/bindings/phy/qcom,edp-phy.yaml > index 293fb6a9b1c330438bceba15226c91e392c840fb..2e594b2ea81d385118684bf58da3440c88ca32b9 100644 > --- a/Documentation/devicetree/bindings/phy/qcom,edp-phy.yaml > +++ b/Documentation/devicetree/bindings/phy/qcom,edp-phy.yaml > @@ -32,12 +32,14 @@ properties: > - description: PLL register block > > clocks: > - maxItems: 2 > + minItems: 2 > + maxItems: 3 > > clock-names: > items: > - const: aux > - const: cfg_ahb > + - const: refclk This does not match clocks. You miss minItems before the items. > > "#clock-cells": > const: 1 > @@ -59,6 +61,25 @@ required: > - "#clock-cells" > - "#phy-cells" > > +allOf: > + - if: > + properties: > + compatible: > + enum: > + - qcom,x1e80100-dp-phy > + then: > + properties: > + clocks: Missing minItems... or you wanted to make it flexible, but then drop entire if branch leading only second one for other variants (maxItems: 2). > + maxItems: 3 > + clock-names: Same here. > + maxItems: 3 > + else: > + properties: > + clocks: > + maxItems: 2 > + clock-names: > + maxItems: 2 > + > additionalProperties: false > > examples: > Best regards, Krzysztof
diff --git a/Documentation/devicetree/bindings/phy/qcom,edp-phy.yaml b/Documentation/devicetree/bindings/phy/qcom,edp-phy.yaml index 293fb6a9b1c330438bceba15226c91e392c840fb..2e594b2ea81d385118684bf58da3440c88ca32b9 100644 --- a/Documentation/devicetree/bindings/phy/qcom,edp-phy.yaml +++ b/Documentation/devicetree/bindings/phy/qcom,edp-phy.yaml @@ -32,12 +32,14 @@ properties: - description: PLL register block clocks: - maxItems: 2 + minItems: 2 + maxItems: 3 clock-names: items: - const: aux - const: cfg_ahb + - const: refclk "#clock-cells": const: 1 @@ -59,6 +61,25 @@ required: - "#clock-cells" - "#phy-cells" +allOf: + - if: + properties: + compatible: + enum: + - qcom,x1e80100-dp-phy + then: + properties: + clocks: + maxItems: 3 + clock-names: + maxItems: 3 + else: + properties: + clocks: + maxItems: 2 + clock-names: + maxItems: 2 + additionalProperties: false examples:
On X Elite platform, the eDP PHY uses one more clock called refclk. Add it to the schema. Cc: stable@vger.kernel.org # v6.10 Fixes: 5d5607861350 ("dt-bindings: phy: qcom-edp: Add X1E80100 PHY compatibles") Signed-off-by: Abel Vesa <abel.vesa@linaro.org> --- .../devicetree/bindings/phy/qcom,edp-phy.yaml | 23 +++++++++++++++++++++- 1 file changed, 22 insertions(+), 1 deletion(-)