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[1/6] dt-bindings: media: rkisp1: Require pclk clock on i.MX8MP variant

Message ID 20250616011115.19515-2-laurent.pinchart@ideasonboard.com
State Not Applicable
Headers show
Series media: rkisp1: Prepare for HDR stitching support | expand

Checks

Context Check Description
robh/checkpatch success
robh/patch-applied success
robh/dt-meta-schema success

Commit Message

Laurent Pinchart June 16, 2025, 1:11 a.m. UTC
The ISP integrated in the NXP i.MX8MP requires the pclk clock to access
the HDR stitching registers. Make it mandatory in the DT binding.

Signed-off-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
---
 Documentation/devicetree/bindings/media/rockchip-isp1.yaml | 4 ++++
 1 file changed, 4 insertions(+)

Comments

Rob Herring (Arm) June 26, 2025, 11:52 p.m. UTC | #1
On Mon, 16 Jun 2025 04:11:10 +0300, Laurent Pinchart wrote:
> The ISP integrated in the NXP i.MX8MP requires the pclk clock to access
> the HDR stitching registers. Make it mandatory in the DT binding.
> 
> Signed-off-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
> ---
>  Documentation/devicetree/bindings/media/rockchip-isp1.yaml | 4 ++++
>  1 file changed, 4 insertions(+)
> 

Reviewed-by: Rob Herring (Arm) <robh@kernel.org>
diff mbox series

Patch

diff --git a/Documentation/devicetree/bindings/media/rockchip-isp1.yaml b/Documentation/devicetree/bindings/media/rockchip-isp1.yaml
index 6be00aca4181..6b360cbb42e0 100644
--- a/Documentation/devicetree/bindings/media/rockchip-isp1.yaml
+++ b/Documentation/devicetree/bindings/media/rockchip-isp1.yaml
@@ -155,6 +155,10 @@  allOf:
             const: fsl,imx8mp-isp
     then:
       properties:
+        clocks:
+          minItems: 4
+        clock-names:
+          minItems: 4
         iommus: false
         phys: false
         phy-names: false