| Message ID | 20231030095849.3456820-3-pankaj.gupta@nxp.com |
|---|---|
| State | Changes Requested |
| Headers | show |
| Series | firmware: imx: NXP Secure-Enclave FW Driver | expand |
| Context | Check | Description |
|---|---|---|
| robh/checkpatch | success | |
| robh/patch-applied | success | |
| robh/dt-meta-schema | fail | build log |
On Mon, 30 Oct 2023 15:28:40 +0530, Pankaj Gupta wrote: > The NXP's i.MX EdgeLock Enclave, a HW IP creating an embedded > secure enclave within the SoC boundary to enable features like > - HSM > - SHE > - V2X > > Communicates via message unit with linux kernel. This driver > is enables communication ensuring well defined message sequence > protocol between Application Core and enclave's firmware. > > Driver configures multiple misc-device on the MU, for multiple > user-space applications can communicate on single MU. > > It exists on some i.MX processors. e.g. i.MX8ULP, i.MX93 etc. > > Signed-off-by: Pankaj Gupta <pankaj.gupta@nxp.com> > --- > .../bindings/firmware/fsl,imx-se-fw.yaml | 83 +++++++++++++++++++ > 1 file changed, 83 insertions(+) > create mode 100644 Documentation/devicetree/bindings/firmware/fsl,imx-se-fw.yaml > My bot found errors running 'make DT_CHECKER_FLAGS=-m dt_binding_check' on your patch (DT_CHECKER_FLAGS is new in v5.13): yamllint warnings/errors: dtschema/dtc warnings/errors: /builds/robherring/dt-review-ci/linux/Documentation/devicetree/bindings/dma/stericsson,dma40.example.dtb: dma-controller@801c0000: sram:0: [4294967295, 4294967295] is too long from schema $id: http://devicetree.org/schemas/dma/stericsson,dma40.yaml# /builds/robherring/dt-review-ci/linux/Documentation/devicetree/bindings/firmware/fsl,imx-se-fw.example.dtb: se-fw2: 'memory-region' is a required property from schema $id: http://devicetree.org/schemas/firmware/fsl,imx-se-fw.yaml# doc reference errors (make refcheckdocs): See https://patchwork.ozlabs.org/project/devicetree-bindings/patch/20231030095849.3456820-3-pankaj.gupta@nxp.com The base for the series is generally the latest rc1. A different dependency should be noted in *this* patch. If you already ran 'make dt_binding_check' and didn't see the above error(s), then make sure 'yamllint' is installed and dt-schema is up to date: pip3 install dtschema --upgrade Please check and re-submit after running the above command yourself. Note that DT_SCHEMA_FILES can be set to your schema file to speed up checking your schema. However, it must be unset to test all examples with your schema.
On 30/10/2023 10:58, Pankaj Gupta wrote: > The NXP's i.MX EdgeLock Enclave, a HW IP creating an embedded > secure enclave within the SoC boundary to enable features like > - HSM > - SHE > - V2X > > Communicates via message unit with linux kernel. This driver > is enables communication ensuring well defined message sequence > protocol between Application Core and enclave's firmware. > > Driver configures multiple misc-device on the MU, for multiple > user-space applications can communicate on single MU. > > It exists on some i.MX processors. e.g. i.MX8ULP, i.MX93 etc. > > Signed-off-by: Pankaj Gupta <pankaj.gupta@nxp.com> > --- > .../bindings/firmware/fsl,imx-se-fw.yaml | 83 +++++++++++++++++++ > 1 file changed, 83 insertions(+) > create mode 100644 Documentation/devicetree/bindings/firmware/fsl,imx-se-fw.yaml > > diff --git a/Documentation/devicetree/bindings/firmware/fsl,imx-se-fw.yaml b/Documentation/devicetree/bindings/firmware/fsl,imx-se-fw.yaml > new file mode 100644 > index 000000000000..0503ea497d61 > --- /dev/null > +++ b/Documentation/devicetree/bindings/firmware/fsl,imx-se-fw.yaml > @@ -0,0 +1,83 @@ > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) > +%YAML 1.2 > +--- > +$id: http://devicetree.org/schemas/firmware/fsl,imx-se-fw.yaml# > +$schema: http://devicetree.org/meta-schemas/core.yaml# > + > +title: NXP i.MX EdgeLock Enclave Firmware (ELEFW) > + > +maintainers: > + - Pankaj Gupta <pankaj.gupta@nxp.com> > + > +description: This is a friendly reminder during the review process. It seems my or other reviewer's previous comments were not fully addressed. Maybe the feedback got lost between the quotes, maybe you just forgot to apply it. Please go back to the previous discussion and either implement all requested changes or keep discussing them. Thank you. Also - not tested > + The NXP's i.MX EdgeLock Enclave, a HW IP creating an embedded > + secure enclave within the SoC boundary to enable features like > + - HSM > + - SHE > + - V2X > + > + It uses message unit to communicate and coordinate to pass messages > + (e.g., data, status and control) through its interfaces. > + > +properties: > + compatible: > + enum: > + - fsl,imx8ulp-se-fw > + - fsl,imx93-se-fw > + > + mboxes: > + description: > + All MU channels must be within the same MU instance. Cross instances are > + not allowed. Users need to ensure that used MU instance does not conflict > + with other execution environments. > + items: > + - description: TX0 MU channel > + - description: RX0 MU channel > + > + mbox-names: > + items: > + - const: tx > + - const: rx > + > + memory-region: > + items: > + - description: Reserved memory region that can be accessed by firmware. Used for > + exchanging the buffers between driver and firmware. > + > + sram: > + description: Phandle to the device SRAM Nothing improved > + $ref: /schemas/types.yaml#/definitions/phandle-array How many items? What's inside? > + > +required: > + - compatible > + - mboxes > + - mbox-names > + > +allOf: > + # memory-region > + - if: > + properties: > + compatible: > + contains: > + enum: > + - fsl,imx8ulp-se-fw > + - fsl,imx93-se-fw > + then: > + required: > + - memory-region > + else: > + not: > + required: > + - memory-region That's not the syntax. Test it. You wanted :false > + > +additionalProperties: false > + > +examples: > + - | > + se-fw2 { And how suddenly "2" appeared here? Anyway: Node names should be generic. See also an explanation and list of examples (not exhaustive) in DT specification: https://devicetree-specification.readthedocs.io/en/latest/chapter2-devicetree-basics.html#generic-names-recommendation > + compatible = "fsl,imx8ulp-se-fw"; > + mbox-names = "tx", "rx"; > + mboxes = <&s4muap 0 0>, <&s4muap 1 0>; Add complete example, so you miss sram. This code is not going well. :( I understand some discussions on properties but lack of testing? At v7 of patchset still not tested? Best regards, Krzysztof
diff --git a/Documentation/devicetree/bindings/firmware/fsl,imx-se-fw.yaml b/Documentation/devicetree/bindings/firmware/fsl,imx-se-fw.yaml new file mode 100644 index 000000000000..0503ea497d61 --- /dev/null +++ b/Documentation/devicetree/bindings/firmware/fsl,imx-se-fw.yaml @@ -0,0 +1,83 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/firmware/fsl,imx-se-fw.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: NXP i.MX EdgeLock Enclave Firmware (ELEFW) + +maintainers: + - Pankaj Gupta <pankaj.gupta@nxp.com> + +description: + The NXP's i.MX EdgeLock Enclave, a HW IP creating an embedded + secure enclave within the SoC boundary to enable features like + - HSM + - SHE + - V2X + + It uses message unit to communicate and coordinate to pass messages + (e.g., data, status and control) through its interfaces. + +properties: + compatible: + enum: + - fsl,imx8ulp-se-fw + - fsl,imx93-se-fw + + mboxes: + description: + All MU channels must be within the same MU instance. Cross instances are + not allowed. Users need to ensure that used MU instance does not conflict + with other execution environments. + items: + - description: TX0 MU channel + - description: RX0 MU channel + + mbox-names: + items: + - const: tx + - const: rx + + memory-region: + items: + - description: Reserved memory region that can be accessed by firmware. Used for + exchanging the buffers between driver and firmware. + + sram: + description: Phandle to the device SRAM + $ref: /schemas/types.yaml#/definitions/phandle-array + +required: + - compatible + - mboxes + - mbox-names + +allOf: + # memory-region + - if: + properties: + compatible: + contains: + enum: + - fsl,imx8ulp-se-fw + - fsl,imx93-se-fw + then: + required: + - memory-region + else: + not: + required: + - memory-region + +additionalProperties: false + +examples: + - | + se-fw2 { + compatible = "fsl,imx8ulp-se-fw"; + mbox-names = "tx", "rx"; + mboxes = <&s4muap 0 0>, <&s4muap 1 0>; + }; + +...
The NXP's i.MX EdgeLock Enclave, a HW IP creating an embedded secure enclave within the SoC boundary to enable features like - HSM - SHE - V2X Communicates via message unit with linux kernel. This driver is enables communication ensuring well defined message sequence protocol between Application Core and enclave's firmware. Driver configures multiple misc-device on the MU, for multiple user-space applications can communicate on single MU. It exists on some i.MX processors. e.g. i.MX8ULP, i.MX93 etc. Signed-off-by: Pankaj Gupta <pankaj.gupta@nxp.com> --- .../bindings/firmware/fsl,imx-se-fw.yaml | 83 +++++++++++++++++++ 1 file changed, 83 insertions(+) create mode 100644 Documentation/devicetree/bindings/firmware/fsl,imx-se-fw.yaml