| Message ID | 20231011111438.909552-5-cleger@rivosinc.com |
|---|---|
| State | Not Applicable |
| Headers | show |
| Series | riscv: report more ISA extensions through hwprobe | expand |
| Context | Check | Description |
|---|---|---|
| robh/checkpatch | success | |
| robh/patch-applied | success | |
| robh/dtbs-check | warning | build log |
| robh/dt-meta-schema | success |
Yo, On Wed, Oct 11, 2023 at 01:14:29PM +0200, Clément Léger wrote: > Add Zv* vector crypto extensions that were added in "RISC-V Cryptography > Extensions Volume II" specificationi[1]: > > - Zvbb: Vector Basic Bit-manipulation > - Zvbc: Vector Carryless Multiplication > - Zvkb: Vector Cryptography Bit-manipulation > - Zvkg: Vector GCM/GMAC. > - Zvkned: NIST Suite: Vector AES Block Cipher > - Zvknh[ab]: NIST Suite: Vector SHA-2 Secure Hash > - Zvksed: ShangMi Suite: SM4 Block Cipher > - Zvksh: ShangMi Suite: SM3 Secure Hash > - Zvkn: NIST Algorithm Suite > - Zvknc: NIST Algorithm Suite with carryless multiply > - Zvkng: NIST Algorithm Suite with GCM. > - Zvks: ShangMi Algorithm Suite > - Zvksc: ShangMi Algorithm Suite with carryless multiplication > - Zvksg: ShangMi Algorithm Suite with GCM. > - Zvkt: Vector Data-Independent Execution Latency. > > [1] https://drive.google.com/file/d/1gb9OLH-DhbCgWp7VwpPOVrrY6f3oSJLL/view Link: <whatever> [1] Acked-by: Conor Dooley <conor.dooley@microchip.com> Thanks, Conor. > Signed-off-by: Clément Léger <cleger@rivosinc.com> > --- > .../devicetree/bindings/riscv/extensions.yaml | 96 +++++++++++++++++++ > 1 file changed, 96 insertions(+) > > diff --git a/Documentation/devicetree/bindings/riscv/extensions.yaml b/Documentation/devicetree/bindings/riscv/extensions.yaml > index cc1f546fdbdc..4002c65145c9 100644 > --- a/Documentation/devicetree/bindings/riscv/extensions.yaml > +++ b/Documentation/devicetree/bindings/riscv/extensions.yaml > @@ -246,5 +246,101 @@ properties: > in commit 2e5236 ("Ztso is now ratified.") of the > riscv-isa-manual. > > + - const: zvbb > + description: > + The standard Zvbb extension for vectored basic bit-manipulation > + instructions, as ratified in commit 56ed795 ("Update > + riscv-crypto-spec-vector.adoc") of riscv-crypto. > + > + - const: zvbc > + description: > + The standard Zvbc extension for vectored carryless multiplication > + instructions, as ratified in commit 56ed795 ("Update > + riscv-crypto-spec-vector.adoc") of riscv-crypto. > + > + - const: zvkb > + description: > + The standard Zvkb extension for vector cryptography bit-manipulation > + instructions, as ratified in commit 56ed795 ("Update > + riscv-crypto-spec-vector.adoc") of riscv-crypto. > + > + - const: zvkg > + description: > + The standard Zvkg extension for vector GCM/GMAC instructions, as > + ratified in commit 56ed795 ("Update riscv-crypto-spec-vector.adoc") > + of riscv-crypto. > + > + - const: zvkn > + description: > + The standard Zvkn extension for NIST algorithm suite instructions, as > + ratified in commit 56ed795 ("Update riscv-crypto-spec-vector.adoc") > + of riscv-crypto. > + > + - const: zvknc > + description: > + The standard Zvknc extension for NIST algorithm suite with carryless > + multiply instructions, as ratified in commit 56ed795 ("Update > + riscv-crypto-spec-vector.adoc") of riscv-crypto. > + > + - const: zvkned > + description: > + The standard Zvkned extension for Vector AES block cipher > + instructions, as ratified in commit 56ed795 ("Update > + riscv-crypto-spec-vector.adoc") of riscv-crypto. > + > + - const: zvkng > + description: > + The standard Zvkng extension for NIST algorithm suite with GCM > + instructions, as ratified in commit 56ed795 ("Update > + riscv-crypto-spec-vector.adoc") of riscv-crypto. > + > + - const: zvknha > + description: | > + The standard Zvknha extension for NIST suite: vector SHA-2 secure, > + hash (SHA-256 only) instructions, as ratified in commit > + 56ed795 ("Update riscv-crypto-spec-vector.adoc") of riscv-crypto. > + > + - const: zvknhb > + description: | > + The standard Zvknhb extension for NIST suite: vector SHA-2 secure, > + hash (SHA-256 and SHA-512) instructions, as ratified in commit > + 56ed795 ("Update riscv-crypto-spec-vector.adoc") of riscv-crypto. > + > + - const: zvks > + description: > + The standard Zvks extension for ShangMi algorithm suite > + instructions, as ratified in commit 56ed795 ("Update > + riscv-crypto-spec-vector.adoc") of riscv-crypto. > + > + - const: zvksc > + description: > + The standard Zvksc extension for ShangMi algorithm suite with > + carryless multiplication instructions, as ratified in commit 56ed795 > + ("Update riscv-crypto-spec-vector.adoc") of riscv-crypto. > + > + - const: zvksed > + description: | > + The standard Zvksed extension for ShangMi suite: SM4 block cipher > + instructions, as ratified in commit 56ed795 ("Update > + riscv-crypto-spec-vector.adoc") of riscv-crypto. > + > + - const: zvksh > + description: | > + The standard Zvksh extension for ShangMi suite: SM3 secure hash > + instructions, as ratified in commit 56ed795 ("Update > + riscv-crypto-spec-vector.adoc") of riscv-crypto. > + > + - const: zvksg > + description: > + The standard Zvksg extension for ShangMi algorithm suite with GCM > + instructions, as ratified in commit 56ed795 ("Update > + riscv-crypto-spec-vector.adoc") of riscv-crypto. > + > + - const: zvkt > + description: > + The standard zvkt extension for vector data-independent execution > + latency, as ratified in commit 56ed795 ("Update > + riscv-crypto-spec-vector.adoc") of riscv-crypto. > + > additionalProperties: true > ... > -- > 2.42.0 >
diff --git a/Documentation/devicetree/bindings/riscv/extensions.yaml b/Documentation/devicetree/bindings/riscv/extensions.yaml index cc1f546fdbdc..4002c65145c9 100644 --- a/Documentation/devicetree/bindings/riscv/extensions.yaml +++ b/Documentation/devicetree/bindings/riscv/extensions.yaml @@ -246,5 +246,101 @@ properties: in commit 2e5236 ("Ztso is now ratified.") of the riscv-isa-manual. + - const: zvbb + description: + The standard Zvbb extension for vectored basic bit-manipulation + instructions, as ratified in commit 56ed795 ("Update + riscv-crypto-spec-vector.adoc") of riscv-crypto. + + - const: zvbc + description: + The standard Zvbc extension for vectored carryless multiplication + instructions, as ratified in commit 56ed795 ("Update + riscv-crypto-spec-vector.adoc") of riscv-crypto. + + - const: zvkb + description: + The standard Zvkb extension for vector cryptography bit-manipulation + instructions, as ratified in commit 56ed795 ("Update + riscv-crypto-spec-vector.adoc") of riscv-crypto. + + - const: zvkg + description: + The standard Zvkg extension for vector GCM/GMAC instructions, as + ratified in commit 56ed795 ("Update riscv-crypto-spec-vector.adoc") + of riscv-crypto. + + - const: zvkn + description: + The standard Zvkn extension for NIST algorithm suite instructions, as + ratified in commit 56ed795 ("Update riscv-crypto-spec-vector.adoc") + of riscv-crypto. + + - const: zvknc + description: + The standard Zvknc extension for NIST algorithm suite with carryless + multiply instructions, as ratified in commit 56ed795 ("Update + riscv-crypto-spec-vector.adoc") of riscv-crypto. + + - const: zvkned + description: + The standard Zvkned extension for Vector AES block cipher + instructions, as ratified in commit 56ed795 ("Update + riscv-crypto-spec-vector.adoc") of riscv-crypto. + + - const: zvkng + description: + The standard Zvkng extension for NIST algorithm suite with GCM + instructions, as ratified in commit 56ed795 ("Update + riscv-crypto-spec-vector.adoc") of riscv-crypto. + + - const: zvknha + description: | + The standard Zvknha extension for NIST suite: vector SHA-2 secure, + hash (SHA-256 only) instructions, as ratified in commit + 56ed795 ("Update riscv-crypto-spec-vector.adoc") of riscv-crypto. + + - const: zvknhb + description: | + The standard Zvknhb extension for NIST suite: vector SHA-2 secure, + hash (SHA-256 and SHA-512) instructions, as ratified in commit + 56ed795 ("Update riscv-crypto-spec-vector.adoc") of riscv-crypto. + + - const: zvks + description: + The standard Zvks extension for ShangMi algorithm suite + instructions, as ratified in commit 56ed795 ("Update + riscv-crypto-spec-vector.adoc") of riscv-crypto. + + - const: zvksc + description: + The standard Zvksc extension for ShangMi algorithm suite with + carryless multiplication instructions, as ratified in commit 56ed795 + ("Update riscv-crypto-spec-vector.adoc") of riscv-crypto. + + - const: zvksed + description: | + The standard Zvksed extension for ShangMi suite: SM4 block cipher + instructions, as ratified in commit 56ed795 ("Update + riscv-crypto-spec-vector.adoc") of riscv-crypto. + + - const: zvksh + description: | + The standard Zvksh extension for ShangMi suite: SM3 secure hash + instructions, as ratified in commit 56ed795 ("Update + riscv-crypto-spec-vector.adoc") of riscv-crypto. + + - const: zvksg + description: + The standard Zvksg extension for ShangMi algorithm suite with GCM + instructions, as ratified in commit 56ed795 ("Update + riscv-crypto-spec-vector.adoc") of riscv-crypto. + + - const: zvkt + description: + The standard zvkt extension for vector data-independent execution + latency, as ratified in commit 56ed795 ("Update + riscv-crypto-spec-vector.adoc") of riscv-crypto. + additionalProperties: true ...
Add Zv* vector crypto extensions that were added in "RISC-V Cryptography Extensions Volume II" specificationi[1]: - Zvbb: Vector Basic Bit-manipulation - Zvbc: Vector Carryless Multiplication - Zvkb: Vector Cryptography Bit-manipulation - Zvkg: Vector GCM/GMAC. - Zvkned: NIST Suite: Vector AES Block Cipher - Zvknh[ab]: NIST Suite: Vector SHA-2 Secure Hash - Zvksed: ShangMi Suite: SM4 Block Cipher - Zvksh: ShangMi Suite: SM3 Secure Hash - Zvkn: NIST Algorithm Suite - Zvknc: NIST Algorithm Suite with carryless multiply - Zvkng: NIST Algorithm Suite with GCM. - Zvks: ShangMi Algorithm Suite - Zvksc: ShangMi Algorithm Suite with carryless multiplication - Zvksg: ShangMi Algorithm Suite with GCM. - Zvkt: Vector Data-Independent Execution Latency. [1] https://drive.google.com/file/d/1gb9OLH-DhbCgWp7VwpPOVrrY6f3oSJLL/view Signed-off-by: Clément Léger <cleger@rivosinc.com> --- .../devicetree/bindings/riscv/extensions.yaml | 96 +++++++++++++++++++ 1 file changed, 96 insertions(+)