| Message ID | 20230913153529.32777-1-bartosz.golaszewski@linaro.org |
|---|---|
| State | Not Applicable |
| Headers | show |
| Series | [1/2] dt-bindings: crypto: ice: document the sa8775p inline crypto engine | expand |
| Context | Check | Description |
|---|---|---|
| robh/checkpatch | success | |
| robh/patch-applied | success | |
| robh/dtbs-check | warning | build log |
| robh/dt-meta-schema | success |
On 13/09/2023 17:35, Bartosz Golaszewski wrote: > Add the compatible string for QCom ICE on sa8775p SoCs. > > Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org> > --- Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Best regards, Krzysztof
On 13.09.2023 17:35, Bartosz Golaszewski wrote: > Add an ICE node to sa8775p SoC description and enable it by adding a > phandle to the UFS node. > > Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org> > --- I don't have any sources backing this up, but 8350 seems to have the exact same register ranges for this block, so I'm inclined to believe it's ok Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Konrad
On Wed, 13 Sep 2023 17:35:28 +0200, Bartosz Golaszewski wrote: > Add the compatible string for QCom ICE on sa8775p SoCs. > > Applied, thanks! [2/2] arm64: dts: qcom: sa8775p: enable the inline crypto engine commit: 96272ba7103d4518e2d0f17daf6fe0008fc6e12c Best regards,
On Wed, Sep 13, 2023 at 5:56 PM Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> wrote: > > On 13/09/2023 17:35, Bartosz Golaszewski wrote: > > Add the compatible string for QCom ICE on sa8775p SoCs. > > > > Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org> > > --- > > Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> > > Best regards, > Krzysztof > Herbert, Gentle ping for the binding as Bjorn already picked up the dts part. Bart
On Wed, Sep 13, 2023 at 05:35:28PM +0200, Bartosz Golaszewski wrote: > Add the compatible string for QCom ICE on sa8775p SoCs. > > Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org> > --- > .../devicetree/bindings/crypto/qcom,inline-crypto-engine.yaml | 1 + > 1 file changed, 1 insertion(+) Patch applied. Thanks.
diff --git a/Documentation/devicetree/bindings/crypto/qcom,inline-crypto-engine.yaml b/Documentation/devicetree/bindings/crypto/qcom,inline-crypto-engine.yaml index 7da9aa82d837..ca4f7d1cefaa 100644 --- a/Documentation/devicetree/bindings/crypto/qcom,inline-crypto-engine.yaml +++ b/Documentation/devicetree/bindings/crypto/qcom,inline-crypto-engine.yaml @@ -13,6 +13,7 @@ properties: compatible: items: - enum: + - qcom,sa8775p-inline-crypto-engine - qcom,sm8450-inline-crypto-engine - qcom,sm8550-inline-crypto-engine - const: qcom,inline-crypto-engine
Add the compatible string for QCom ICE on sa8775p SoCs. Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org> --- .../devicetree/bindings/crypto/qcom,inline-crypto-engine.yaml | 1 + 1 file changed, 1 insertion(+)