| Message ID | 20230823224453.126963-1-rgallaispou@gmail.com |
|---|---|
| State | Changes Requested, archived |
| Headers | show |
| Series | [v3] dt-bindings: irqchip: convert st,stih407-irq-syscfg to DT schema | expand |
| Context | Check | Description |
|---|---|---|
| robh/checkpatch | warning | total: 0 errors, 2 warnings, 64 lines checked |
| robh/patch-applied | success | |
| robh/dtbs-check | warning | build log |
| robh/dt-meta-schema | success |
On Thu, Aug 24, 2023 at 12:44:53AM +0200, Raphael Gallais-Pou wrote: > Convert deprecated format to DT schema format. > > Signed-off-by: Raphael Gallais-Pou <rgallaispou@gmail.com> > Reviewed-by: Conor Dooley <conor.dooley@microchip.com> > --- > Changes in v2: > - Added Conor's r-by > - Removed quotes surrounding $refs > - Hardcoded 'st,invert-ext' possible values > > Changes in v3: > - Fixed enum syntax warnings > - Removed reference to driver in favor of device > --- > .../st,sti-irq-syscfg.txt | 30 --------- > .../st,stih407-irq-syscfg.yaml | 64 +++++++++++++++++++ > 2 files changed, 64 insertions(+), 30 deletions(-) > delete mode 100644 Documentation/devicetree/bindings/interrupt-controller/st,sti-irq-syscfg.txt > create mode 100644 Documentation/devicetree/bindings/interrupt-controller/st,stih407-irq-syscfg.yaml > > diff --git a/Documentation/devicetree/bindings/interrupt-controller/st,sti-irq-syscfg.txt b/Documentation/devicetree/bindings/interrupt-controller/st,sti-irq-syscfg.txt > deleted file mode 100644 > index 977d7ed3670e..000000000000 > --- a/Documentation/devicetree/bindings/interrupt-controller/st,sti-irq-syscfg.txt > +++ /dev/null > @@ -1,30 +0,0 @@ > -STMicroelectronics STi System Configuration Controlled IRQs > ------------------------------------------------------------ > - > -On STi based systems; External, CTI (Core Sight), PMU (Performance Management), > -and PL310 L2 Cache IRQs are controlled using System Configuration registers. > -This driver is used to unmask them prior to use. > - > -Required properties: > -- compatible : Should be "st,stih407-irq-syscfg" > -- st,syscfg : Phandle to Cortex-A9 IRQ system config registers > -- st,irq-device : Array of IRQs to enable - should be 2 in length > -- st,fiq-device : Array of FIQs to enable - should be 2 in length > - > -Optional properties: > -- st,invert-ext : External IRQs can be inverted at will. This property inverts > - these IRQs using bitwise logic. A number of defines have been > - provided for convenience: > - ST_IRQ_SYSCFG_EXT_1_INV > - ST_IRQ_SYSCFG_EXT_2_INV > - ST_IRQ_SYSCFG_EXT_3_INV > -Example: > - > -irq-syscfg { > - compatible = "st,stih407-irq-syscfg"; > - st,syscfg = <&syscfg_cpu>; > - st,irq-device = <ST_IRQ_SYSCFG_PMU_0>, > - <ST_IRQ_SYSCFG_PMU_1>; > - st,fiq-device = <ST_IRQ_SYSCFG_DISABLED>, > - <ST_IRQ_SYSCFG_DISABLED>; > -}; > diff --git a/Documentation/devicetree/bindings/interrupt-controller/st,stih407-irq-syscfg.yaml b/Documentation/devicetree/bindings/interrupt-controller/st,stih407-irq-syscfg.yaml > new file mode 100644 > index 000000000000..985fa281f027 > --- /dev/null > +++ b/Documentation/devicetree/bindings/interrupt-controller/st,stih407-irq-syscfg.yaml > @@ -0,0 +1,64 @@ > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) > +%YAML 1.2 > +--- > +$id: http://devicetree.org/schemas/interrupt-controller/st,stih407-irq-syscfg.yaml# > +$schema: http://devicetree.org/meta-schemas/core.yaml# > + > +title: STMicroelectronics STi System Configuration Controlled IRQs > + > +maintainers: > + - Patrice Chotard <patrice.chotard@foss.st.com> > + > +description: > + On STi based systems; External, CTI (Core Sight), PMU (Performance > + Management), and PL310 L2 Cache IRQs are controlled using System > + Configuration registers. This device is used to unmask them prior to use. > + > +properties: > + compatible: > + const: st,stih407-irq-syscfg > + > + st,syscfg: > + description: Phandle to Cortex-A9 IRQ system config registers > + $ref: /schemas/types.yaml#/definitions/phandle > + > + st,irq-device: > + description: Array of IRQs to enable. > + $ref: /schemas/types.yaml#/definitions/uint32-array > + items: > + - description: Enable the IRQ of the channel one. > + - description: Enable the IRQ of the channel two. > + > + st,fiq-device: > + description: Array of FIQs to enable. > + $ref: /schemas/types.yaml#/definitions/uint32-array > + items: > + - description: Enable the IRQ of the channel one. > + - description: Enable the IRQ of the channel two. > + > + st,invert-ext: > + description: External IRQs can be inverted at will. This property inverts > + these IRQs using bitwise logic. So this is a mask? > + $ref: /schemas/types.yaml#/definitions/uint32 > + enum: [ 1, 2, 4] If so, then this is wrong if you want to set more than 1 bit. > + > +required: > + - compatible > + - st,syscfg > + - st,irq-device > + - st,fiq-device > + > +additionalProperties: false > + > +examples: > + - | > + #include <dt-bindings/interrupt-controller/irq-st.h> > + irq-syscfg { > + compatible = "st,stih407-irq-syscfg"; > + st,syscfg = <&syscfg_cpu>; > + st,irq-device = <ST_IRQ_SYSCFG_PMU_0>, > + <ST_IRQ_SYSCFG_PMU_1>; > + st,fiq-device = <ST_IRQ_SYSCFG_DISABLED>, > + <ST_IRQ_SYSCFG_DISABLED>; > + }; > +... > -- > 2.41.0 >
Hi Rob Le 24/08/2023 à 15:48, Rob Herring a écrit : > On Thu, Aug 24, 2023 at 12:44:53AM +0200, Raphael Gallais-Pou wrote: >> Convert deprecated format to DT schema format. >> >> Signed-off-by: Raphael Gallais-Pou <rgallaispou@gmail.com> >> Reviewed-by: Conor Dooley <conor.dooley@microchip.com> >> --- >> Changes in v2: >> - Added Conor's r-by >> - Removed quotes surrounding $refs >> - Hardcoded 'st,invert-ext' possible values >> >> Changes in v3: >> - Fixed enum syntax warnings >> - Removed reference to driver in favor of device >> --- >> .../st,sti-irq-syscfg.txt | 30 --------- >> .../st,stih407-irq-syscfg.yaml | 64 +++++++++++++++++++ >> 2 files changed, 64 insertions(+), 30 deletions(-) >> delete mode 100644 Documentation/devicetree/bindings/interrupt-controller/st,sti-irq-syscfg.txt >> create mode 100644 Documentation/devicetree/bindings/interrupt-controller/st,stih407-irq-syscfg.yaml >> >> diff --git a/Documentation/devicetree/bindings/interrupt-controller/st,sti-irq-syscfg.txt b/Documentation/devicetree/bindings/interrupt-controller/st,sti-irq-syscfg.txt >> deleted file mode 100644 >> index 977d7ed3670e..000000000000 >> --- a/Documentation/devicetree/bindings/interrupt-controller/st,sti-irq-syscfg.txt >> +++ /dev/null >> @@ -1,30 +0,0 @@ >> -STMicroelectronics STi System Configuration Controlled IRQs >> ------------------------------------------------------------ >> - >> -On STi based systems; External, CTI (Core Sight), PMU (Performance Management), >> -and PL310 L2 Cache IRQs are controlled using System Configuration registers. >> -This driver is used to unmask them prior to use. >> - >> -Required properties: >> -- compatible : Should be "st,stih407-irq-syscfg" >> -- st,syscfg : Phandle to Cortex-A9 IRQ system config registers >> -- st,irq-device : Array of IRQs to enable - should be 2 in length >> -- st,fiq-device : Array of FIQs to enable - should be 2 in length >> - >> -Optional properties: >> -- st,invert-ext : External IRQs can be inverted at will. This property inverts >> - these IRQs using bitwise logic. A number of defines have been >> - provided for convenience: >> - ST_IRQ_SYSCFG_EXT_1_INV >> - ST_IRQ_SYSCFG_EXT_2_INV >> - ST_IRQ_SYSCFG_EXT_3_INV >> -Example: >> - >> -irq-syscfg { >> - compatible = "st,stih407-irq-syscfg"; >> - st,syscfg = <&syscfg_cpu>; >> - st,irq-device = <ST_IRQ_SYSCFG_PMU_0>, >> - <ST_IRQ_SYSCFG_PMU_1>; >> - st,fiq-device = <ST_IRQ_SYSCFG_DISABLED>, >> - <ST_IRQ_SYSCFG_DISABLED>; >> -}; >> diff --git a/Documentation/devicetree/bindings/interrupt-controller/st,stih407-irq-syscfg.yaml b/Documentation/devicetree/bindings/interrupt-controller/st,stih407-irq-syscfg.yaml >> new file mode 100644 >> index 000000000000..985fa281f027 >> --- /dev/null >> +++ b/Documentation/devicetree/bindings/interrupt-controller/st,stih407-irq-syscfg.yaml >> @@ -0,0 +1,64 @@ >> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) >> +%YAML 1.2 >> +--- >> +$id: http://devicetree.org/schemas/interrupt-controller/st,stih407-irq-syscfg.yaml# >> +$schema: http://devicetree.org/meta-schemas/core.yaml# >> + >> +title: STMicroelectronics STi System Configuration Controlled IRQs >> + >> +maintainers: >> + - Patrice Chotard <patrice.chotard@foss.st.com> >> + >> +description: >> + On STi based systems; External, CTI (Core Sight), PMU (Performance >> + Management), and PL310 L2 Cache IRQs are controlled using System >> + Configuration registers. This device is used to unmask them prior to use. >> + >> +properties: >> + compatible: >> + const: st,stih407-irq-syscfg >> + >> + st,syscfg: >> + description: Phandle to Cortex-A9 IRQ system config registers >> + $ref: /schemas/types.yaml#/definitions/phandle >> + >> + st,irq-device: >> + description: Array of IRQs to enable. >> + $ref: /schemas/types.yaml#/definitions/uint32-array >> + items: >> + - description: Enable the IRQ of the channel one. >> + - description: Enable the IRQ of the channel two. >> + >> + st,fiq-device: >> + description: Array of FIQs to enable. >> + $ref: /schemas/types.yaml#/definitions/uint32-array >> + items: >> + - description: Enable the IRQ of the channel one. >> + - description: Enable the IRQ of the channel two. >> + >> + st,invert-ext: >> + description: External IRQs can be inverted at will. This property inverts >> + these IRQs using bitwise logic. > > So this is a mask? Of course, I did not had clarity given the hour I sent this, but it is indeed a bitmask. > >> + $ref: /schemas/types.yaml#/definitions/uint32 >> + enum: [ 1, 2, 4] > > If so, then this is wrong if you want to set more than 1 bit. So knowing this is a mask, it can take any integer between 1 and 4 in our case. > >> + >> +required: >> + - compatible >> + - st,syscfg >> + - st,irq-device >> + - st,fiq-device >> + >> +additionalProperties: false >> + >> +examples: >> + - | >> + #include <dt-bindings/interrupt-controller/irq-st.h> >> + irq-syscfg { >> + compatible = "st,stih407-irq-syscfg"; >> + st,syscfg = <&syscfg_cpu>; >> + st,irq-device = <ST_IRQ_SYSCFG_PMU_0>, >> + <ST_IRQ_SYSCFG_PMU_1>; >> + st,fiq-device = <ST_IRQ_SYSCFG_DISABLED>, >> + <ST_IRQ_SYSCFG_DISABLED>; >> + }; >> +... >> -- >> 2.41.0 >>
On 24/08/2023 18:32, Raphaël Gallais-Pou wrote: >>> + st,invert-ext: >>> + description: External IRQs can be inverted at will. This property inverts >>> + these IRQs using bitwise logic. >> >> So this is a mask? > > Of course, I did not had clarity given the hour I sent this, but it is > indeed a bitmask. >> >>> + $ref: /schemas/types.yaml#/definitions/uint32 >>> + enum: [ 1, 2, 4] >> >> If so, then this is wrong if you want to set more than 1 bit. > So knowing this is a mask, it can take any integer between 1 and 4 in > our case. No, 1 + 4 = 5. *more than 1 bit* Best regards, Krzysztof
diff --git a/Documentation/devicetree/bindings/interrupt-controller/st,sti-irq-syscfg.txt b/Documentation/devicetree/bindings/interrupt-controller/st,sti-irq-syscfg.txt deleted file mode 100644 index 977d7ed3670e..000000000000 --- a/Documentation/devicetree/bindings/interrupt-controller/st,sti-irq-syscfg.txt +++ /dev/null @@ -1,30 +0,0 @@ -STMicroelectronics STi System Configuration Controlled IRQs ------------------------------------------------------------ - -On STi based systems; External, CTI (Core Sight), PMU (Performance Management), -and PL310 L2 Cache IRQs are controlled using System Configuration registers. -This driver is used to unmask them prior to use. - -Required properties: -- compatible : Should be "st,stih407-irq-syscfg" -- st,syscfg : Phandle to Cortex-A9 IRQ system config registers -- st,irq-device : Array of IRQs to enable - should be 2 in length -- st,fiq-device : Array of FIQs to enable - should be 2 in length - -Optional properties: -- st,invert-ext : External IRQs can be inverted at will. This property inverts - these IRQs using bitwise logic. A number of defines have been - provided for convenience: - ST_IRQ_SYSCFG_EXT_1_INV - ST_IRQ_SYSCFG_EXT_2_INV - ST_IRQ_SYSCFG_EXT_3_INV -Example: - -irq-syscfg { - compatible = "st,stih407-irq-syscfg"; - st,syscfg = <&syscfg_cpu>; - st,irq-device = <ST_IRQ_SYSCFG_PMU_0>, - <ST_IRQ_SYSCFG_PMU_1>; - st,fiq-device = <ST_IRQ_SYSCFG_DISABLED>, - <ST_IRQ_SYSCFG_DISABLED>; -}; diff --git a/Documentation/devicetree/bindings/interrupt-controller/st,stih407-irq-syscfg.yaml b/Documentation/devicetree/bindings/interrupt-controller/st,stih407-irq-syscfg.yaml new file mode 100644 index 000000000000..985fa281f027 --- /dev/null +++ b/Documentation/devicetree/bindings/interrupt-controller/st,stih407-irq-syscfg.yaml @@ -0,0 +1,64 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/interrupt-controller/st,stih407-irq-syscfg.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: STMicroelectronics STi System Configuration Controlled IRQs + +maintainers: + - Patrice Chotard <patrice.chotard@foss.st.com> + +description: + On STi based systems; External, CTI (Core Sight), PMU (Performance + Management), and PL310 L2 Cache IRQs are controlled using System + Configuration registers. This device is used to unmask them prior to use. + +properties: + compatible: + const: st,stih407-irq-syscfg + + st,syscfg: + description: Phandle to Cortex-A9 IRQ system config registers + $ref: /schemas/types.yaml#/definitions/phandle + + st,irq-device: + description: Array of IRQs to enable. + $ref: /schemas/types.yaml#/definitions/uint32-array + items: + - description: Enable the IRQ of the channel one. + - description: Enable the IRQ of the channel two. + + st,fiq-device: + description: Array of FIQs to enable. + $ref: /schemas/types.yaml#/definitions/uint32-array + items: + - description: Enable the IRQ of the channel one. + - description: Enable the IRQ of the channel two. + + st,invert-ext: + description: External IRQs can be inverted at will. This property inverts + these IRQs using bitwise logic. + $ref: /schemas/types.yaml#/definitions/uint32 + enum: [ 1, 2, 4] + +required: + - compatible + - st,syscfg + - st,irq-device + - st,fiq-device + +additionalProperties: false + +examples: + - | + #include <dt-bindings/interrupt-controller/irq-st.h> + irq-syscfg { + compatible = "st,stih407-irq-syscfg"; + st,syscfg = <&syscfg_cpu>; + st,irq-device = <ST_IRQ_SYSCFG_PMU_0>, + <ST_IRQ_SYSCFG_PMU_1>; + st,fiq-device = <ST_IRQ_SYSCFG_DISABLED>, + <ST_IRQ_SYSCFG_DISABLED>; + }; +...