From patchwork Wed Aug 16 15:29:25 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jisheng Zhang X-Patchwork-Id: 1821955 Return-Path: X-Original-To: incoming-dt@patchwork.ozlabs.org Delivered-To: patchwork-incoming-dt@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=kernel.org header.i=@kernel.org header.a=rsa-sha256 header.s=k20201202 header.b=KEEdMxD0; dkim-atps=neutral Authentication-Results: legolas.ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=vger.kernel.org (client-ip=2620:137:e000::1:20; helo=out1.vger.email; envelope-from=devicetree-owner@vger.kernel.org; receiver=patchwork.ozlabs.org) Received: from out1.vger.email (out1.vger.email [IPv6:2620:137:e000::1:20]) by legolas.ozlabs.org (Postfix) with ESMTP id 4RQspW3FcWz1yXY for ; Thu, 17 Aug 2023 01:42:43 +1000 (AEST) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1344272AbjHPPmM (ORCPT ); Wed, 16 Aug 2023 11:42:12 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:58432 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1344239AbjHPPls (ORCPT ); Wed, 16 Aug 2023 11:41:48 -0400 Received: from dfw.source.kernel.org (dfw.source.kernel.org [IPv6:2604:1380:4641:c500::1]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 0475F26A6; Wed, 16 Aug 2023 08:41:48 -0700 (PDT) Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits)) (No client certificate requested) by dfw.source.kernel.org (Postfix) with ESMTPS id 75FC564D2A; Wed, 16 Aug 2023 15:41:47 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 5E34BC433C8; Wed, 16 Aug 2023 15:41:42 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1692200506; bh=d0jes+KrJeiWl6LJI3nrjoLh3/r6+H9lE5veVs3+NN8=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=KEEdMxD0b9PLscPEqG8w/hUc7DEM9kbhfjd2v65dvGQMUN+FT6pldecS8L+DOR+4Z ZzV1WITkzhou/COccdDVKQaO6FsfchN4yjW8OyK7ExzfS/gezDhNDxYDEBJMn1q7Ae ksbxbvQUeu6h4UQSKIsYvRodgiXk/7OOBynz7rquDOboqsadS8+74KJsqnvPDBWuUx ezNr+/AuEIl7IpxWAsMAWK/pgBb01lTBdpFCV4XibHAB2i9ybfqGEh/xKs62e5VKCd dD8F/40VkeZ3xdz5OiYImXFWgQyIBwLKMEULzp03OXhsRAQcT8HuaOfqf8TkOhYYpO 13RDrc08fcksA== From: Jisheng Zhang To: "David S . Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Giuseppe Cavallaro , Alexandre Torgue , Jose Abreu Cc: netdev@vger.kernel.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, linux-stm32@st-md-mailman.stormreply.com, linux-arm-kernel@lists.infradead.org Subject: [PATCH net-next v4 8/9] dt-bindings: net: snps,dwmac: add per channel irq support Date: Wed, 16 Aug 2023 23:29:25 +0800 Message-Id: <20230816152926.4093-9-jszhang@kernel.org> X-Mailer: git-send-email 2.40.0 In-Reply-To: <20230816152926.4093-1-jszhang@kernel.org> References: <20230816152926.4093-1-jszhang@kernel.org> MIME-Version: 1.0 X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF, RCVD_IN_DNSWL_BLOCKED,SPF_HELO_NONE,SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org The IP supports optional per channel interrupt, add support for this usage case. Signed-off-by: Jisheng Zhang --- .../devicetree/bindings/net/snps,dwmac.yaml | 68 +++++++++++++++++++ 1 file changed, 68 insertions(+) diff --git a/Documentation/devicetree/bindings/net/snps,dwmac.yaml b/Documentation/devicetree/bindings/net/snps,dwmac.yaml index b8d01bba6e1a..a916701474dc 100644 --- a/Documentation/devicetree/bindings/net/snps,dwmac.yaml +++ b/Documentation/devicetree/bindings/net/snps,dwmac.yaml @@ -103,15 +103,51 @@ properties: interrupts: minItems: 1 + maxItems: 37 + additionalItems: true items: - description: Combined signal for various interrupt events - description: The interrupt to manage the remote wake-up packet detection - description: The interrupt that occurs when Rx exits the LPI state - description: The interrupt that occurs when Safety Feature Correctible Errors happen - description: The interrupt that occurs when Safety Feature Uncorrectible Errors happen + - description: rx0 per-channel interrupt + - description: rx1 per-channel interrupt + - description: rx2 per-channel interrupt + - description: rx3 per-channel interrupt + - description: rx4 per-channel interrupt + - description: rx5 per-channel interrupt + - description: rx6 per-channel interrupt + - description: rx7 per-channel interrupt + - description: rx8 per-channel interrupt + - description: rx9 per-channel interrupt + - description: rx10 per-channel interrupt + - description: rx11 per-channel interrupt + - description: rx12 per-channel interrupt + - description: rx13 per-channel interrupt + - description: rx14 per-channel interrupt + - description: rx15 per-channel interrupt + - description: tx0 per-channel interrupt + - description: tx1 per-channel interrupt + - description: tx2 per-channel interrupt + - description: tx3 per-channel interrupt + - description: tx4 per-channel interrupt + - description: tx5 per-channel interrupt + - description: tx6 per-channel interrupt + - description: tx7 per-channel interrupt + - description: tx8 per-channel interrupt + - description: tx9 per-channel interrupt + - description: tx10 per-channel interrupt + - description: tx11 per-channel interrupt + - description: tx12 per-channel interrupt + - description: tx13 per-channel interrupt + - description: tx14 per-channel interrupt + - description: tx15 per-channel interrupt interrupt-names: minItems: 1 + maxItems: 37 + additionalItems: true items: - const: macirq - enum: @@ -119,6 +155,38 @@ properties: - eth_lpi - sfty_ce - sfty_ue + - rx0 + - rx1 + - rx2 + - rx3 + - rx4 + - rx5 + - rx6 + - rx7 + - rx8 + - rx9 + - rx10 + - rx11 + - rx12 + - rx13 + - rx14 + - rx15 + - tx0 + - tx1 + - tx2 + - tx3 + - tx4 + - tx5 + - tx6 + - tx7 + - tx8 + - tx9 + - tx10 + - tx11 + - tx12 + - tx13 + - tx14 + - tx15 clocks: minItems: 1